W83627EHF Datasheet, PDF (66/141 Pages) Winbond – evolving product from Winbonds most popular I/O family

W83627EHF/EF, W83627EHG/EG
Bit 4: SYSTIN OVT# mode select. This bit default is set to 0, which is compared mode. When set to 1,
interrupt mode will be selected.
Bit 3-1: Reserved.
Bit 0: Reserved.
6.8.28 Reserved - Index 19h (Bank 0)
6.8.29 Reserved - Index 1A-1Bh (Bank 0)
6.8.30 Reserved - Index 1Ch-1Fh (Bank 0)
6.8.31 Value RAM  Index 20h- 3Fh (Bank 0)
ADDRESS A6-A0
20h
CPUVCORE reading
DESCRIPTION
21h
VIN0 reading
22h
AVCC reading
23h
3VCC reading
24h
VIN1 reading
25h
VIN2 reading
26h
VIN3 reading
27h
SYSTIN temperature sensor reading
SYSFANIN reading
28h
Note: This location stores the number of counts of the internal clock per
revolution.
CPUFANIN0 reading
29h
Note: This location stores the number of counts of the internal clock per
revolution.
AUXFANIN0 reading
2Ah
Note: This location stores the number of counts of the internal clock per
revolution.
2Bh
CPUVCORE High Limit
2Ch
CPUVCORE Low Limit
2Dh
VIN0 High Limit
2Eh
VIN0 Low Limit
2Fh
AVCC High Limit
30h
AVCC Low Limit
31h
3VCC High Limit
32h
3VCC Low Limit
-60-