W83627EHF Datasheet, PDF (53/141 Pages) Winbond – evolving product from Winbonds most popular I/O family

W83627EHF/EF, W83627EHG/EG
6.8.5 CPUFANOUT0 PWM Output Frequency Configuration Register - Index 02h (Bank 0)
Register Location:
02h
Power on Default Value:
04h
Attribute:
Read/Write
Size:
8 bits
7 6 5 4 32 1 0
PWM_SCALE2
PWM_CLK_SEL2
The register is meaningful when CPUFANOUT0 be programmed as PWM output.
Bit 7: CPUFANOUT0 PWM Input Clock Source Select. This bit selects the clock source of PWM
output frequency.
Set to 0, select 24 MHz.
Set to 1, select 180 KHz.
Bit 6-0: CPUFANOUT0 PWM Pre-Scale divider. This is the divider of clock source of PWM
output frequency. The maximum divider is 128 (7Fh). This divider should not be set to 0.
01h : divider is 1
02h : divider is 2
03h : divider is 3
:
:
the formula is
PWM output frequency =
Input Clock
Pre_Scale Divider
∗
1
256
6.8.6 CPUFANOUT0 Output Value Select Register - Index 03h (Bank 0)
Register Location:
03h
Power on Default Value:
FFh
Attribute:
Read/Write
Size:
8 bits
Publication Release Date: January 18, 2006
-47-
Revision 1.0