W83627EHF Datasheet, PDF (50/141 Pages) Winbond – evolving product from Winbonds most popular I/O family

W83627EHF/EF, W83627EHG/EG
Bit 7-0: Data to be read from or to be written to RAM and Register.
6.8.3 SYSFANOUT PWM Output Frequency Configuration Register - Index 00h (Bank 0)
Register Location:
00h
Power on Default Value:
04h
Attribute:
Read/Write
Size:
8 bits
7 6 5 43 2 1 0
PWM_SCALE1
PWM_CLK_SEL1
The register is meaningful when SYSFANOUT be programmed as PWM output.
Bit 7: SYSFANOUT PWM Input Clock Source Select. This bit selects the clock source of PWM output
frequency.
Set to 0, select 24 MHz.
Set to 1, select 180 KHz.
Bit 6-0: SYSFANOUT PWM Pre-Scale divider. This is the divider of clock source of PWM output
frequency. The maximum divider is 128 (7Fh). This divider should not be set to 0.
01h : divider is 1
02h : divider is 2
03h : divider is 3
:
:
the formula is
PWM output frequency =
Input Clock
Pre_Scale Divider
∗
1
256
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