LM3S5K36 Datasheet, PDF (897/1050 Pages) Texas Instruments – Stellaris® LM3S5K36 Microcontroller

Stellaris^® LM3S5K36 Microcontroller
Register 9: PWM Status (PWMSTATUS), offset 0x020
This register provides the unlatched status of the PWM generator fault condition.
PWM Status (PWMSTATUS)
PWM0 base: 0x4002.8000
Offset 0x020
Type RO, reset 0x0000.0000
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
reserved
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
reserved
FAULT3 FAULT2 FAULT1 FAULT0
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit/Field
31:4
3
Name
reserved
FAULT3
Type
Reset Description
RO 0x0000.000 Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
RO
0
Generator 3 Fault Status
Value Description
1 The fault condition for PWM generator 3 is asserted.
If the FLTSRC bit in the PWM3CTL register is clear, the input
is the source of the fault condition, and is therefore asserted.
0 The fault condition for PWM generator 3 is not asserted.
2
FAULT2
RO
0
Generator 2 Fault Status
Value Description
1 The fault condition for PWM generator 2 is asserted.
If the FLTSRC bit in the PWM2CTL register is clear, the input
is the source of the fault condition, and is therefore asserted.
0 The fault condition for PWM generator 2 is not asserted.
1
FAULT1
RO
0
Generator 1 Fault Status
Value Description
1 The fault condition for PWM generator 1 is asserted.
If the FLTSRC bit in the PWM1CTL register is clear, the input
is the source of the fault condition, and is therefore asserted.
0 The fault condition for PWM generator 1 is not asserted.
January 21, 2012
897
Texas Instruments-Production Data