LM3S5K36 Datasheet, PDF (1027/1050 Pages) Texas Instruments – Stellaris® LM3S5K36 Microcontroller

Stellaris^® LM3S5K36 Microcontroller
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15
14
13
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8
SSIPCellID1, type RO, offset 0xFF4, reset 0x0000.00F0 (see page 699)
SSIPCellID2, type RO, offset 0xFF8, reset 0x0000.0005 (see page 700)
SSIPCellID3, type RO, offset 0xFFC, reset 0x0000.00B1 (see page 701)
Inter-Integrated Circuit (I²C) Interface
I²C Master
I2C 0 base: 0x4002.0000
I2C 1 base: 0x4002.1000
I2CMSA, type R/W, offset 0x000, reset 0x0000.0000
I2CMCS, type RO, offset 0x004, reset 0x0000.0020 (Read-Only Status Register)
I2CMCS, type WO, offset 0x004, reset 0x0000.0020 (Write-Only Control Register)
I2CMDR, type R/W, offset 0x008, reset 0x0000.0000
I2CMTPR, type R/W, offset 0x00C, reset 0x0000.0001
I2CMIMR, type R/W, offset 0x010, reset 0x0000.0000
I2CMRIS, type RO, offset 0x014, reset 0x0000.0000
I2CMMIS, type RO, offset 0x018, reset 0x0000.0000
I2CMICR, type WO, offset 0x01C, reset 0x0000.0000
I2CMCR, type R/W, offset 0x020, reset 0x0000.0000
Inter-Integrated Circuit (I²C) Interface
I²C Slave
I2C 0 base: 0x4002.0000
I2C 1 base: 0x4002.1000
I2CSOAR, type R/W, offset 0x800, reset 0x0000.0000
I2CSCSR, type RO, offset 0x804, reset 0x0000.0000 (Read-Only Status Register)
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7
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2
1
0
CID1
CID2
CID3
SA
R/S
BUSBSY IDLE ARBLST DATACK ADRACK ERROR BUSY
ACK
STOP START RUN
DATA
TPR
IM
RIS
MIS
IC
SFE
MFE
LPBK
OAR
FBR
TREQ RREQ
January 21, 2012
Texas Instruments-Production Data
1027