LM3S5K36 Datasheet, PDF (595/1050 Pages) Texas Instruments – Stellaris® LM3S5K36 Microcontroller

Stellaris^® LM3S5K36 Microcontroller
Register 38: ADC Digital Comparator Reset Initial Conditions (ADCDCRIC),
offset 0xD00
This register provides the ability to reset any of the digital comparator interrupt or trigger functions
back to their initial conditions. Resetting these functions ensures that the data that is being used by
the interrupt and trigger functions in the digital comparator unit is not stale.
ADC Digital Comparator Reset Initial Conditions (ADCDCRIC)
ADC0 base: 0x4003.8000
ADC1 base: 0x4003.9000
Offset 0xD00
Type R/W, reset 0x0000.0000
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
reserved
DCTRIG7 DCTRIG6 DCTRIG5 DCTRIG4 DCTRIG3 DCTRIG2 DCTRIG1 DCTRIG0
Type RO
RO
RO
RO
RO
RO
RO
RO
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
reserved
DCINT7 DCINT6 DCINT5 DCINT4 DCINT3 DCINT2 DCINT1 DCINT0
Type RO
RO
RO
RO
RO
RO
RO
RO
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit/Field
31:24
23
22
Name
reserved
DCTRIG7
DCTRIG6
Type
RO
R/W
R/W
Reset
0x00
0
0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Digital Comparator Trigger 7
Value Description
1 Resets the Digital Comparator 7 trigger unit to its initial
conditions.
0 No effect.
When the trigger has been cleared, this bit is automatically cleared.
Because the digital comparators use the current and previous ADC
conversion values to determine when to assert the trigger, it is important
to reset the digital comparator to initial conditions when starting a new
sequence so that stale data is not used. After setting this bit, software
should wait until the bit clears before continuing.
Digital Comparator Trigger 6
Value Description
1 Resets the Digital Comparator 6 trigger unit to its initial
conditions.
0 No effect.
When the trigger has been cleared, this bit is automatically cleared.
Because the digital comparators use the current and previous ADC
conversion values to determine when to assert the trigger, it is important
to reset the digital comparator to initial conditions when starting a new
sequence so that stale data is not used.
January 21, 2012
595
Texas Instruments-Production Data