MSP430F677X1_16 Datasheet, PDF (89/162 Pages) Texas Instruments – Polyphase Metering SoCs

MSP430F677x1, MSP430F676x1, MSP430F674x1
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SLAS815C – NOVEMBER 2012 – REVISED DECEMBER 2013
10-Bit ADC Power Supply and Input Range Conditions
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
AV_CC
V_(Ax)
PARAMETER
TEST CONDITIONS
Analog supply voltage
Analog input voltage range⁽¹⁾
AVCC and DVCC are connected together,
AVSS and DVSS are connected together,
V_(AVSS) = V_(DVSS) = 0 V
All ADC10_A pins
Operating supply current into f_ADC10CLK = 5 MHz, ADC10ON = 1, REFON = 0,
AVCC terminal, REF module SHT0 = 0, SHT1 = 0, ADC10DIV = 0,
and reference buffer off
ADC10SREF = 00
V_CC
2.2 V
3V
MIN TYP MAX UNIT
1.8
3.6 V
0
AV_CC V
68 100
µA
78 110
Operating supply current into f_ADC10CLK = 5 MHz, ADC10ON = 1, REFON = 1,
AVCC terminal, REF module SHT0 = 0, SHT1 = 0, ADC10DIV = 0,
3V
on, reference buffer on
ADC10SREF = 01
I_{ADC10_A}
Operating supply current into f_ADC10CLK = 5 MHz, ADC10ON = 1, REFON = 0,
AVCC terminal, REF module SHT0 = 0, SHT1 = 0, ADC10DIV = 0,
3V
off, reference buffer on
ADC10SREF = 10, VEREF = 2.5 V
124 180 µA
105 160 µA
Operating supply current into f_ADC10CLK = 5 MHz, ADC10ON = 1, REFON = 0,
AVCC terminal, REF module SHT0 = 0, SHT1 = 0, ADC10DIV = 0,
3V
off, reference buffer off
ADC10SREF = 11, VEREF = 2.5 V
72 110 µA
C_I
Input capacitance
Only one terminal Ax can be selected at one time
from the pad to the ADC10_A capacitor array
including wiring and pad.
2.2 V
3.5
pF
R_I
Input MUX ON resistance
AV_CC > 2.0V, 0 V ≤ V_Ax ≤ AV_CC
1.8V < AV_CC < 2.0V, 0 V ≤ V_Ax ≤ AV_CC
36
kΩ
96
(1) The analog input voltage range must be within the selected reference voltage range V_R+ to V_R– for valid conversion results. The external
reference voltage requires decoupling capacitors. Two decoupling capacitors, 10 µF and 100 nF, should be connected to VREF to
decouple the dynamic current required for an external reference source if it is used for the ADC10_A. Also see the MSP430x5xx and
MSP430x6xx Family User's Guide (SLAU208).
10-Bit ADC Timing Parameters
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
f_ADC10CLK
TEST CONDITIONS
For specified performance of ADC10_A linearity
parameters
V_CC
2.2 V, 3 V
MIN TYP
0.45
5
f_ADC10OSC
Internal ADC10_A
oscillator ⁽¹⁾
ADC10DIV = 0, f_ADC10CLK = f_ADC10OSC
2.2 V, 3 V
4.4 4.9
t_CONVERT Conversion time
REFON = 0, Internal oscillator,
12 ADC10CLK cycles, 10-bit mode,
f_ADC10OSC = 4 MHz to 5 MHz
External f_ADC10CLK from ACLK, MCLK or SMCLK,
ADC10SSEL ≠ 0
2.2 V, 3 V
2.4
See
(2)
t_ADC10ON
t_Sample
Turn on settling time of
the ADC
Sampling time
See ⁽³⁾
R_S = 1000 Ω, R_I = 96 kΩ, C_I = 3.5 pF⁽⁴⁾
R_S = 1000 Ω, R_I = 36 kΩ, C_I = 3.5 pF⁽⁴⁾
1.8 V
3
3V
1
MAX UNIT
5.5 MHz
5.6 MHz
3.0
µs
100 ns
µs
µs
(1) The ADC10OSC is sourced directly from MODOSC inside the UCS.
(2) 12 × ADC10DIV × 1/f_ADC10CLK
(3) The condition is that the error in a conversion started after t_ADC10ON is less than ±0.5 LSB. The reference and input signal are already
settled.
(4) Approximately eight Tau (τ) are needed to get an error of less than ±0.5 LSB
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