MSP430F677X1_16 Datasheet, PDF (52/162 Pages) Texas Instruments – Polyphase Metering SoCs

MSP430F677x1, MSP430F676x1, MSP430F674x1
SLAS815C – NOVEMBER 2012 – REVISED DECEMBER 2013
Table 55. DMA Channel 1 Registers (Base Address: 0500h)
REGISTER DESCRIPTION
DMA channel 1 control
DMA channel 1 source address low
DMA channel 1 source address high
DMA channel 1 destination address low
DMA channel 1 destination address high
DMA channel 1 transfer size
REGISTER
DMA1CTL
20h
DMA1SAL
22h
DMA1SAH
24h
DMA1DAL
26h
DMA1DAH
28h
DMA1SZ
2Ah
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OFFSET
Table 56. DMA Channel 2 Registers (Base Address: 0500h)
REGISTER DESCRIPTION
DMA channel 2 control
DMA channel 2 source address low
DMA channel 2 source address high
DMA channel 2 destination address low
DMA channel 2 destination address high
DMA channel 2 transfer size
REGISTER
DMA2CTL
30h
DMA2SAL
32h
DMA2SAH
34h
DMA2DAL
36h
DMA2DAH
38h
DMA2SZ
3Ah
OFFSET
Table 57. eUSCI_A0 Registers (Base Address: 05C0h)
REGISTER DESCRIPTION
USCI_A control word 0
USCI _A control word 1
USCI_A baud rate 0
USCI_A baud rate 1
USCI_A modulation control
USCI_A status
USCI_A receive buffer
USCI_A transmit buffer
USCI_A LIN control
USCI_A IrDA transmit control
USCI_A IrDA receive control
USCI_A interrupt enable
USCI_A interrupt flags
USCI_A interrupt vector word
REGISTER
UCA0CTLW0
UCA0CTLW1
UCA0BR0
UCA0BR1
UCA0MCTLW
UCA0STAT
UCA0RXBUF
UCA0TXBUF
UCA0ABCTL
UCA0IRTCTL
UCA0IRRCTL
UCA0IE
UCA0IFG
UCA0IV
OFFSET
00h
02h
06h
07h
08h
0Ah
0Ch
0Eh
10h
12h
13h
1Ah
1Ch
1Eh
52
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