MSP430F677X1_16 Datasheet, PDF (45/162 Pages) Texas Instruments – Polyphase Metering SoCs

MSP430F677x1, MSP430F676x1, MSP430F674x1
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SLAS815C – NOVEMBER 2012 – REVISED DECEMBER 2013
Table 33. SYS Registers (Base Address: 0180h)
REGISTER DESCRIPTION
System control
Bootstrap loader configuration area
JTAG mailbox control
JTAG mailbox input 0
JTAG mailbox input 1
JTAG mailbox output 0
JTAG mailbox output 1
Bus Error vector generator
User NMI vector generator
System NMI vector generator
Reset vector generator
REGISTER
SYSCTL
SYSBSLC
SYSJMBC
SYSJMBI0
SYSJMBI1
SYSJMBO0
SYSJMBO1
SYSBERRIV
SYSUNIV
SYSSNIV
SYSRSTIV
OFFSET
00h
02h
06h
08h
0Ah
0Ch
0Eh
18h
1Ah
1Ch
1Eh
Table 34. Shared Reference Registers (Base Address: 01B0h)
REGISTER DESCRIPTION
Shared reference control
REGISTER
REFCTL
00h
OFFSET
Table 35. Port Mapping Controller (Base Address: 01C0h)
REGISTER DESCRIPTION
Port mapping password register
Port mapping control register
REGISTER
PMAPPWD
PMAPCTL
OFFSET
00h
02h
Table 36. Port Mapping for Port P2 (Base Address: 01D0h)
REGISTER DESCRIPTION
Port P2.0 mapping register
Port P2.1 mapping register
Port P2.2 mapping register
Port P2.3 mapping register
Port P2.4 mapping register
Port P2.5 mapping register
Port P2.6 mapping register
Port P2.7 mapping register
REGISTER
P2MAP0
00h
P2MAP1
01h
P2MAP2
02h
P2MAP3
03h
P2MAP4
04h
P2MAP5
05h
P2MAP6
06h
P2MAP7
07h
OFFSET
Table 37. Port Mapping for Port P3 (Base Address: 01D8h)
REGISTER DESCRIPTION
Port P3.0 mapping register
Port P3.1 mapping register
Port P3.2 mapping register
Port P3.3 mapping register
Port P3.4 mapping register
Port P3.5 mapping register
Port P3.6 mapping register
Port P3.7 mapping register
REGISTER
P3MAP0
00h
P3MAP1
01h
P3MAP2
02h
P3MAP3
03h
P3MAP4
04h
P3MAP5
05h
P3MAP6
06h
P3MAP7
07h
OFFSET
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