MSP430F677X1_16 Datasheet, PDF (86/162 Pages) Texas Instruments – Polyphase Metering SoCs

MSP430F677x1, MSP430F676x1, MSP430F674x1
SLAS815C – NOVEMBER 2012 – REVISED DECEMBER 2013
www.ti.com
SD24_B Performance (continued)
f_SD24 = 1 MHz, SD24OSRx = 256, SD24REFON = 1
PARAMETER
TEST CONDITIONS
SD24GAIN: 1, f_CM = 50 Hz, V_CM = 930 mV
3V
CMRR,50Hz
Common mode rejection at
50 Hz⁽⁸⁾
SD24GAIN: 8, f_CM = 50 Hz, V_CM = 120 mV
3V
SD24GAIN: 32, f_CM = 50 Hz, V_CM = 30 mV
3V
SD24GAIN: 1, V_CC = 3 V + 50 mV × sin(2π × f_VCC ×
t), f_VCC = 50 Hz
AC
PSRR,ext
AC power supply rejection
ratio, external reference⁽⁹⁾
SD24GAIN: 8, V_CC = 3 V + 50 mV × sin(2π × f_VCC ×
t), f_VCC = 50 Hz
SD24GAIN: 32, V_CC = 3 V + 50 mV × sin(2π × f_VCC ×
t), f_VCC = 50 Hz
SD24GAIN: 1, V_CC = 3 V + 50 mV × sin(2π × f_VCC ×
t), f_VCC = 50 Hz
AC
PSRR,int
AC power supply rejection
ratio, internal reference⁽⁹⁾
SD24GAIN: 8, V_CC = 3 V + 50 mV × sin(2π × f_VCC ×
t), f_VCC = 50 Hz
SD24GAIN: 32, V_CC = 3 V + 50 mV × sin(2π × f_VCC ×
t), f_VCC = 50 Hz
Crosstalk source: SD24GAIN: 1, Sine-wave with
maximum possible Vpp, f_IN = 50 Hz, 100 Hz,
3V
Converter under test: SD24GAIN: 1
XT
Crosstalk between
converters ⁽¹⁰⁾
Crosstalk source: SD24GAIN: 1, Sine-wave with
maximum possible Vpp, f_IN = 50 Hz, 100 Hz,
Converter under test: SD24GAIN: 8
3V
Crosstalk source: SD24GAIN: 1, Sine-wave with
maximum possible Vpp, f_IN = 50 Hz, 100 Hz,
3V
Converter under test: SD24GAIN: 32
MIN TYP MAX UNIT
-120
-110
dB
-100
-61
-75
dB
-79
-61
-75
dB
-79
-120
-115
dB
-110
(8) The AC CMRR is the difference between a hypothetical signal with the amplitude and frequency of the applied common mode ripple
applied to the inputs of the ADC and the actual common mode signal spur visible in the FFT spectrum:
AC CMRR = Error Spur [dBFS] - 20log(V_CM/1.2V/G) [dBFS] with a common mode signal of V_CM × sin(2π × f_CM × t) applied to the analog
inputs.
The AC CMRR is measured with the both inputs connected to the common mode signal; that is, no differential input signal is applied.
With the specified typical values the error spur is within the noise floor (as specified by the SINAD values).
(9) The AC PSRR is the difference between a hypothetical signal with the amplitude and frequency of the applied supply voltage ripple
applied to the inputs of the ADC and the actual supply ripple spur visible in the FFT spectrum:
AC PSRR = Error Spur [dBFS] - 20log(50mV/1.2V/G) [dBFS] with a signal of 50mV × sin(2π × f_VCC × t) added to V_CC.
The AC PSRR is measured with the inputs grounded; that is, no analog input signal is applied.
With the specified typical values the error spur is within the noise floor (as specified by the SINAD values).
SD24GAIN: 1 → Hypothetical signal: 20log(50mV/1.2V/1) = -27.6 dBFS
SD24GAIN: 8 → Hypothetical signal: 20log(50mV/1.2V/8) = -9.5 dBFS
SD24GAIN: 32 → Hypothetical signal: 20log(50mV/1.2V/32) = 2.5 dBFS
(10) The crosstalk XT is specified as the tone level of the signal applied to the crosstalk source seen in the spectrum of the converter under
test. It is measured with the inputs of the converter under test being grounded.
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