DS100BR111A_15 Datasheet, PDF (8/51 Pages) Texas Instruments – Ultra Low Power 10.3 Gbps 1-Lane Repeaters with Input Equalization and Output De-Emphasis

DS100BR111A
SNLS400D – JANUARY 2012 – REVISED JANUARY 2015
www.ti.com
Electrical Characteristics (continued)
PARAMETER
TEST CONDITIONS
V_{OD_DE3}
De-Emphasis Levels
OUT+ and OUT- AC coupled and
terminated by 50 Ω to GND
VOD_SEL = Float (850 mVpp)
DE = HIGH
V_CM-AC
Output Common-Mode Voltage
AC Common Mode Voltage
DE = 0 dB, VOD ≤ 1000 mVpp
V_CM-DC
Output DC Common-Mode
Voltage
DC Common Mode Voltage
V_IDLE
TX IDLE Output Voltage
VID = 0 mVp-p
SDD22 @ 4.1 GHz
RL_TX-DIFF
TX return loss
SDD22 @ 11.1 GHz
SCC22 @ 2.5 GHz
Delta_Z_M
T_R/F
T_PD
Transmitter Termination
Mismatch
Transmitter Rise and Fall Time
Propagation Delay
SCC22 @ 11.1 GHz
DC, I_FORCE = ± 100 µA ⁽³⁾
Measurement points at 20% - 80% ⁽⁴⁾
Measured at 50% crossing
EQ = 0x00
T_CCSK
Channel to Channel Skew
T_PPSK
Part to Part Skew
T_{TX-IDLE-SET-TO-} Max time to transition to idle after
IDLE
differential signal
T_TX-IDLE-TO-
DIFF-DATA
Max time to transition to valid
differential signal after idle
T_{ENV_DISTORT}
Active OOB timing distortion,
input active time vs. output active
time
OUTPUT JITTER SPECIFICATIONS⁽⁵⁾
T = 25°C, VDD = 2.5 V
T = 25°C, VDD = 2.5 V
VIN = 1 Vpp, 10 Gbps
EQ = 0x00, DE = 0 dB
VIN = 1 Vpp, 10 Gbps
EQ = 0x00, DE = 0 dB
R_J
Random Jitter
D_J1
Deterministic Jitter
No Media
Source Amplitude = 700 mVpp,
PRBS15 pattern,
10.3125 Gbps
VOD = Default, EQ = minimum,
DE = 0 dB
EQUALIZATION
D_JE1
Residual Deterministic Jitter
10.3125 Gbps
8 meter 30AWG Cable on Input
Source = 700 mVpp, PRBS15 pattern
EQ = 0x2B
D_JE2
Residual Deterministic Jitter
10.3125 Gbps
30" 4-mil FR4 on Inputs
Source = 700 mVpp, PRBS15 pattern
EQ = 0x17
DE-EMPHASIS
D_JD1
Residual Deterministic Jitter
10.3125 Gbps
10” 4 mil stripline FR4 on Outputs
Source = 700 mVpp, PRBS15 pattern
EQ = Min, VOD = 1050 mVpp,
DE = -3.5 dB
MIN
TYP
MAX UNIT
-9
dB
4.5
0
1.1
-13
-9
-22
-10
2.5%
38
230
7
20
6.5
3.2
3.3
mV (rms)
1.9
V
30 mV
dB
ps
ps
ps
ps
ns
ns
ns
0.3
ps (rms)
0.09
UI
0.23
UI
0.15
UI
0.14
UI
(3) Force ±100 µA on output, measure ΔV on the Output and calculate impedance. Mismatch is the percentage difference of OUTn+ and
OUTn- impedance driving the same logic state.
(4) Default VOD used for testing. DE = -1.5 dB level used to compensate for fixture attenuation.
(5) Typical jitter reported is determined by jitter decomposition software on the DSA8200 Oscilloscope.
8
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