DS100BR111A_15 Datasheet, PDF (36/51 Pages) Texas Instruments – Ultra Low Power 10.3 Gbps 1-Lane Repeaters with Input Equalization and Output De-Emphasis

DS100BR111A
SNLS400D – JANUARY 2012 – REVISED JANUARY 2015
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Typical Application (continued)
9.2.1 Design Requirements
As with any high speed design, there are many factors that influence the overall performance. Below are a list of
critical areas for consideration during design.
• Use 100 Ω impedance traces. Length matching on the P and N traces should be done on the single-ended
segments of the differential pair.
• Use uniform trace width and trace spacing for differential pairs.
• Place AC-coupling capacitors near to the receiver end of each channel segment to minimize reflections.
• The maximum body size for AC-coupling capacitors is 0402.
• Back-drill connector vias and signal vias to minimize stub length.
• Use Reference plane vias to ensure a low inductance path for the return current.
9.2.2 Detailed Design Procedure
The DS100BR111A is designed to be placed at an offset location with respect to the overall channel attenuation.
In order to optimize performance, the repeater requires optimization to extend the reach of the cable or trace
length while also recovering a solid eye opening. For a generic 10GbE application where link training is not
required, the following settings in Table 10 and Table 11 may be referenced as an initial starting point:
Table 10. Suggested Generic 10GbE Initial Device Settings in Pin Mode⁽¹⁾
CHANNEL SETTINGS
EQx[1:0]
VOD_SEL
DEMx
PIN MODE
0, 0
0
0
(1) For 10GbE applications, the MODE pin should be tied high.
Table 11. Suggested Generic 10GbE Initial Device Settings in SMBus Modes
CHANNEL SETTINGS
EQx
VODx
DEMx
SMBus MODES
0x00
000'b
000'b
The SMBus Slave Mode code example in Table 12 may be used to program the DS100BR111A with the
recommended device settings.
REGISTER
0x06
0x08
0x0F
0x11
0x16
0x18
0x23
0x28
0x2D
Table 12. SMBus 10GbE Example Sequence
WRITE VALUE
0x18
0x04
0x00
0x00
0x00
0x00
0x00
0x00
0xA1
COMMENTS
Set SMBus Slave Mode Register Enable.
Enable Output Mode Control for individual channel outputs.
Set CHA EQ to 0x00.
Set CHA DEM to 000'b.
Set CHB EQ to 0x00.
Set CHB DEM to 000'b.
Set CHA VOD to 000'b.
Leave Idle Control at default levels.
For SAS/SATA applications, set Reg 0x28 to 0x4C.
Set CHB VOD to 000'b.
Examples of the repeater performance are illustrated in the performance curves in the next section.
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