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DS100BR111A_15 Datasheet, PDF (29/51 Pages) Texas Instruments – Ultra Low Power 10.3 Gbps 1-Lane Repeaters with Input Equalization and Output De-Emphasis
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DS100BR111A
SNLS400D – JANUARY 2012 – REVISED JANUARY 2015
8.6 Register Maps
Table 9. SMBus Slave Mode Register Map
ADDRESS
0x00
0x01
0x02
0x03
0x04
0x05
REGISTER
NAME
Device ID
Control 1
Control 2
Reserved
Control 3
Reserved
BIT
7
6:3
2
1:0
7:6
5:3
2
1:0
7:6
5
4
3
2
1
0
7:0
7:6
5
4
3
2
1:0
7:0
FIELD
Reserved
SMBus Address
[3:0]
EEPROM Reading
Done
Reserved
Idle Control
Reserved
LOS Select
Reserved
Reserved
LOS override
LOS override value
PWDN Inputs
PWDN Oscillator
Reserved
Reserved
Reserved
eSATA Mode
Enable
TX_DIS Override
Enable
TX_DIS Value
Channel A
TX_DIS Value
Channel B
Reserved
EQ Stage 4
Limiting Control
Reserved
TYPE
R/W
R
R
RWSC
R/W
R/W
R/W
R/W
R/W
DEFAULT
0x00
0x00
0x00
0x00
0x00
0x00
EEPROM
REG BIT
Set bit to 0
DESCRIPTION
SMBus strap observation
1 = EEPROM Done Loading
0 = EEPROM Loading
Set bits to 0
Continuous Talk Control (Output Always On)
[7]: Continuous talk ENABLE (Channel A)
[6]: Continuous talk ENABLE (Channel B)
Set bits to 0
Yes
LOS Monitor Selection
1 = Use LOS from CH B
0 = Use LOS from CH A
Set bits to 0
Set bits to 0
Yes
1 = LOS pin override enable
0 = Use Normal Signal Detection
Yes
1 = Normal Operation
0 = Output LOS
Yes 1 = PWDN
Yes 0 = Normal Operation
Set bit to 0
Yes Set bit to 0
Reserved
[7] Channel A (1)
[6] Channel B (1)
1 = Override Use Reg 0x04[4:3]
0 = Normal Operation - uses pin
1 = Channel A TX Disabled
0 = Channel A TX Enabled
1 = Channel B TX Disabled
Yes 0 = Channel B TX Enabled
Set bit to 0
[1]: Channel B - EQ Stage 4 Limiting On/Off
[0]: Channel A - EQ Stage 4 Limiting On/Off
Setting this control bit turns on added voltage
gain compared to normal operating range. If the
bits are set to 1 (On), the EQ will act as a
limiting amplifier, resulting in reduction of
overall linear gain characteristics.
Reserved
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