DS100BR111A_15 Datasheet, PDF (44/51 Pages) Texas Instruments – Ultra Low Power 10.3 Gbps 1-Lane Repeaters with Input Equalization and Output De-Emphasis

DS100BR111A
SNLS400D – JANUARY 2012 – REVISED JANUARY 2015
Layout Example (continued)
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Differential
Vias
Uniform trace
2 1 width and spacing
12
21
> 25
654 3 21
7
24
8
23
9
GND
BOTTOM OF PKG
22
(TOP LAYER)
10
21
12
Via to Bottom Layer
V_DD
Via to GND Layer
7
21
5
5
5
21
7
Via to GND Layer for
return current path
11
20
12
19
Pad on Bottom Layer
13 14 15 16 17 18
V_IN
Via to VIN Layer
Via to GND Layer
Pad on Bottom Layer
7
5
5
5
7
Figure 40. DS100BR111A Example Layout
44
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