DS100BR111A_15 Datasheet, PDF (15/51 Pages) Texas Instruments – Ultra Low Power 10.3 Gbps 1-Lane Repeaters with Input Equalization and Output De-Emphasis

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DS100BR111A
SNLS400D – JANUARY 2012 – REVISED JANUARY 2015
Level
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
VOD_SEL ^{(2) (3)}
0
0
0
0
F
F
F
F
R
R
R
R
1
1
1
1
Table 4. De-Emphasis and Output Voltage Settings⁽¹⁾
DEMA/B
0
F
R
1
0
F
R
1
0
F
R
1
0
F
R
1
SMBus Register
DEM Level
000
010
011
101
000
010
011
101
000
010
011
101
000
001
001
010
SMBus Register
VOD Level
000
000
000
000
011
011
011
011
101
101
101
101
100
100
110
110
VOD (mVpp)
575
575
575
575
850
850
850
850
1050
1050
1050
1050
950
950
1150
1150
DEM (dB)
0
-3.5
-6
-9
0
-3.5
-6
-9
-0
-3.5
-6
-9
0
-1.5
-1.5
-3.5
(1) The DS100BR111A VOD for OUTPUT A is limited to 575 mVpp in pin mode (ENSMB=0). With ENSMB = 1 or Float, the VOD for
OUTPUT A can be adjusted with SMBus register 0x23 [4:2] as shown in Table 9.
(2) Below VOD = 850 mVpp, output setting de-emphasis gain is reduced.
(3) In SMBus Mode, if VOD_SEL is in the Logic 1 state (1 kΩ resistor to VIN or VDD), the DS100BR111A AD0-AD3 pins are internally
forced to 0.
8.5 Programming
8.5.1 System Management Bus (SMBus) and Configuration Registers
The System Management Bus interface is compatible with the SMBus 2.0 physical layer specification. Tie
ENSMB = 1 kΩ to VDD (2.5 V mode) or VIN (3.3 V mode) to enable SMBus Slave Mode and allow access to the
configuration registers.
The DS100BR111A uses AD[3:0] inputs in both SMBus Modes. These AD[3:0] pins are the user set SMBus
slave address inputs and have internal pull-downs. Based on the SMBus 2.0 specification, the DS100BR111A
has a 7-bit slave address. The LSB is set to 0'b (for a WRITE). When AD[3:0] pins are left floating or pulled low,
AD[3:0] = 0000'b, and the device default address byte is 0xB0. The device supports up to 16 address bytes, as
shown in Table 5.
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