DS100BR111A_15 Datasheet, PDF (19/51 Pages) Texas Instruments – Ultra Low Power 10.3 Gbps 1-Lane Repeaters with Input Equalization and Output De-Emphasis

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DS100BR111A
SNLS400D – JANUARY 2012 – REVISED JANUARY 2015
low. This pin should be connected to the READEN pin of another DS100BR111A. When this second
DS100BR111A senses its READEN pin driven low, it will take command of the SMBus and read its initial
configuration from the external EEPROM, after which it will set its DONE pin low. By connecting the DONE pin of
each DS100BR111A to the READEN pin of the next DS100BR111A, each DS100BR111A can read its initial
configuration from the EEPROM without causing bus contention.
EEPROM
GND
AD0
GND
AD1
GND
AD2
One or both of these lines
should float for EEPROM
larger than 256 bytes.
SDA
SCL
3.3V
Note: Set AD[3:0] of each DS100BR111A to unique SMBus Address.
From External
SMBus Master
FLOAT
FLOAT
FLOAT
OUTA+ 7
OUTA- 8
AD1 9
AD0 10
INB+ 11
INB- 12
SMBUS AND
CONTROL
24 INA+ ^OUTA+ 7
23 INA- ^OUTA- 8
22 _VDD
AD1 9
21 _VDD
AD0 10
20 OUTB+ ^{INB+ 11}
19 OUTB- ^{INB- 12}
SMBUS AND
CONTROL
24 INA+ OUTA+ ₇
23 INA- OUTA- 8
22 _VDD
AD1 9
21 _VDD
AD0 10
20 OUTB+ INB+ 11
19 ^OUTB- INB- 12
SMBUS AND
CONTROL
24 INA+
23 INA-
22 _VDD
21 _VDD
20 OUTB+
19 OUTB-
Figure 9. Typical Multi-Device EEPROM Connection Diagram
8.5.6.2 EEPROM Address Mapping
A detailed EEPROM Address Mapping for a single device is shown in Table 6. For instances where multiple
devices are written to EEPROM, the device starting address definitions align starting with Byte 0x03. A register
map overview for a multi-device EEPROM address map is shown in Table 7.
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