DS100BR111A_15 Datasheet, PDF (33/51 Pages) Texas Instruments – Ultra Low Power 10.3 Gbps 1-Lane Repeaters with Input Equalization and Output De-Emphasis

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DS100BR111A
SNLS400D – JANUARY 2012 – REVISED JANUARY 2015
Register Maps (continued)
Table 9. SMBus Slave Mode Register Map (continued)
ADDRESS
0x27
REGISTER
NAME
Reserved
BIT
7
6:4
3:0
7
FIELD
Reserved
Reserved
Reserved
Reserved
6
Override Fast Idle
0x28
Idle Control ^{5:4 en_hi_idle_th[1:0]}
3:2 en_fast_idle[1:0]
1:0 Reserved
0x29-0x2A Reserved 7:0 Reserved
7:6 Reserved
0x2B
Reserved 5:2 Reserved
1:0 Reserved
0x2C
Reserved 7:0 Reserved
7:5 Reserved
0x2D
CH B VOD
Control
4:2
VOD_CHB[2:0]
1:0 Reserved
0x2E
7:3 Reserved
Reserved
2:0 Reserved
7
Reserved
0x2F
Reserved 6:4 Reserved
3:0 Reserved
0x30-0x31 Reserved 7:0 Reserved
7:6 Reserved
0x32
Reserved 5:2 Reserved
1:0 Reserved
0x33
Reserved 7:0 Reserved
0x34
Reserved 7:0 Reserved
0x35
7:3 Reserved
Reserved
2:0 Reserved
7
Reserved
0x36
Reserved 6:4 Reserved
3:0 Reserved
0x37-0x38 Reserved 7:0 Reserved
7:6 Reserved
0x39
Reserved 5:2 Reserved
1:0 Reserved
0x3A
Reserved 7:0 Reserved
TYPE
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
DEFAULT
0x00
0x00
0x00
0x00
0x2F
0xAD
0x02
0x00
0x00
0x00
0x2F
0xAD
0x02
0x00
0x00
0x00
0x2F
EEPROM
REG BIT
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
DESCRIPTION
Reserved
Reserved
Reserved
Set bit to 0
1 = Enable Fast IDLE control in Reg 0x28[3:2]
0 = Disable Fast IDLE control in Reg 0x28[3:2].
Enable high SD thresholds (Slow IDLE)
[5]: CH A
[4]: CH B
Enable Fast IDLE
[3]: CH A
[2]: CH B
Set bits to 0
Reserved
Reserved
Reserved
Reserved
Reserved
Set bits to 101'b
VOD Controls for CH B
000'b = 575 mVpp
001'b = 650 mVpp
010'b = 750 mVpp
011'b = 850 mVpp (Default)
100'b = 950 mVpp
101'b = 1050 mVpp
110'b = 1150 mVpp
Set bits to 01'b
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
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