LM3S2776 Datasheet, PDF (758/785 Pages) Texas Instruments – Stellaris® LM3S2776 Microcontroller

Register Quick Reference
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
HIBMIS, type RO, offset 0x01C, reset 0x0000.0000 (see page 254)
HIBIC, type R/W1C, offset 0x020, reset 0x0000.0000 (see page 255)
EXTW LOWBAT RTCALT1 RTCALT0
HIBRTCT, type R/W, offset 0x024, reset 0x0000.7FFF (see page 256)
EXTW LOWBAT RTCALT1 RTCALT0
HIBDATA, type R/W, offset 0x030-0x12C, reset - (see page 257)
Internal Memory
ROM Registers (System Control Offset)
Base 0x400F.E000
RMCTL, type R/W1C, offset 0x0F0, reset -
TRIM
RTD
RTD
Internal Memory
Flash Memory Control Registers (Flash Control Offset)
Base 0x400F.D000
FMA, type R/W, offset 0x000, reset 0x0000.0000
FMD, type R/W, offset 0x004, reset 0x0000.0000
FMC, type R/W, offset 0x008, reset 0x0000.0000
FCRIS, type RO, offset 0x00C, reset 0x0000.0000
OFFSET
DATA
DATA
WRKEY
BA
OFFSET
COMT MERASE ERASE WRITE
FCIM, type R/W, offset 0x010, reset 0x0000.0000
PRIS
ARIS
FCMISC, type R/W1C, offset 0x014, reset 0x0000.0000
PMASK AMASK
Internal Memory
Flash Memory Protection Registers (System Control Offset)
Base 0x400F.E000
USECRL, type R/W, offset 0x140, reset 0x31
PMISC AMISC
FMPRE0, type R/W, offset 0x130 and 0x200, reset 0xFFFF.FFFF
FMPPE0, type R/W, offset 0x134 and 0x400, reset 0xFFFF.FFFF
READ_ENABLE
READ_ENABLE
PROG_ENABLE
PROG_ENABLE
USEC
758
November 17, 2011
Texas Instruments-Production Data