LM3S2776 Datasheet, PDF (183/785 Pages) Texas Instruments – Stellaris® LM3S2776 Microcontroller

Stellaris® LM3S2776 Microcontroller
Table 5-6. System Control Register Map (continued)
Offset Name
Type
Reset
Description
0x050 RIS
0x054 IMC
0x058 MISC
0x05C RESC
0x060 RCC
0x064 PLLCFG
0x06C GPIOHBCTL
0x070 RCC2
0x07C MOSCCTL
0x100 RCGC0
0x104 RCGC1
0x108 RCGC2
0x110 SCGC0
0x114 SCGC1
0x118 SCGC2
0x120 DCGC0
0x124 DCGC1
0x128 DCGC2
0x144 DSLPCLKCFG
RO
R/W
R/W1C
R/W
R/W
RO
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0x0000.0000
0x0000.0000
0x0000.0000
-
0x078E.3AD1
-
0x0000.0000
0x0780.6810
0x0000.0000
0x00000040
0x00000000
0x00000000
0x00000040
0x00000000
0x00000000
0x00000040
0x00000000
0x00000000
0x0780.0000
Raw Interrupt Status
Interrupt Mask Control
Masked Interrupt Status and Clear
Reset Cause
Run-Mode Clock Configuration
XTAL to PLL Translation
GPIO High-Performance Bus Control
Run-Mode Clock Configuration 2
Main Oscillator Control
Run Mode Clock Gating Control Register 0
Run Mode Clock Gating Control Register 1
Run Mode Clock Gating Control Register 2
Sleep Mode Clock Gating Control Register 0
Sleep Mode Clock Gating Control Register 1
Sleep Mode Clock Gating Control Register 2
Deep Sleep Mode Clock Gating Control Register 0
Deep Sleep Mode Clock Gating Control Register 1
Deep Sleep Mode Clock Gating Control Register 2
Deep Sleep Clock Configuration
5.5 Register Descriptions
All addresses given are relative to the System Control base address of 0x400F.E000.
See
page
188
189
190
191
192
196
197
199
201
215
221
227
217
223
229
219
225
231
202
November 17, 2011
183
Texas Instruments-Production Data