LM3S2776 Datasheet, PDF (661/785 Pages) Texas Instruments – Stellaris® LM3S2776 Microcontroller

Stellaris® LM3S2776 Microcontroller
17.3.7
The counter in a PWM unit generator can be reset to zero by writing the PWM Time Base Sync
(PWMSYNC) register and setting the Sync bit associated with the generator. Multiple PWM
generators can be synchronized together by setting all necessary Sync bits in one access. For
example, setting the Sync0 and Sync1 bits in the PWMSYNC register causes the counters in PWM
generators 0 and 1 to reset together.
Additionally, the state of a PWM unit is affected by writing to the registers of the PWM unit and the
PWM units' generators, which has an effect on the synchronization between multiple PWM generators.
Depending on the register accessed, the register state is updated in one of the following three ways:
■ Immediately. The write value has immediate effect, and the hardware reacts immediately.
■ Locally Synchronized. The write value does not affect the logic until the counter reaches the
value zero. In this case, the effect of the write is deferred until the end of the PWM cycle (when
the counter reaches zero). By waiting for the counter to reach zero, a guaranteed behavior is
defined, and overly short or overly long output PWM pulses are prevented.
■ Globally Synchronized. The write value does not affect the logic until two sequential events
have occurred: (1) the global synchronization bit applicable to the generator is set, and (2) the
counter reaches zero. In this case, the effect of the write is deferred until the end of the PWM
cycle (when the counter reaches zero) following the end of all updates. This mode allows multiple
items in multiple PWM generators to be updated simultaneously without odd effects during the
update; everything runs from the old values until a point at which they all run from the new values.
The Update mode of the load and comparator match values can be individually configured in
each PWM generator block. It typically makes sense to use the synchronous update mechanism
across PWM generator blocks when the timers in those blocks are synchronized, although this
is not required in order for this mechanism to function properly.
The following registers provide either local or global synchronization based on the state of the
PWMnCTL register Update bit value:
■ Generator Registers: PWMnLOAD, PWMnCMPA, and PWMnCMPB
The following registers are provided with the optional functionality of synchronously updating rather
than having all updates take immediate effect. The default update mode is immediate.
■ Module-Level Register: PWMENABLE
■ Generator Register: PWMnGENA, PWMnGENB, PWMnDBCTL, PWMnDBRISE, and
PWMnDBFALL.
All other registers are considered statically provisioned for the execution of an application or are
used dynamically for purposes unrelated to maintaining synchronization, and therefore, do not need
synchronous update functionality.
Fault Conditions
A fault condition is one in which the controller must be signaled to stop normal PWM function and
then sets the outputs to a safe state. There are two basic situations where this becomes necessary:
■ The controller is stalled and cannot perform the necessary computation in the time required for
motion control
■ An external error or event is detected, such as an error
November 17, 2011
661
Texas Instruments-Production Data