LM3S2776 Datasheet, PDF (690/785 Pages) Texas Instruments – Stellaris® LM3S2776 Microcontroller

Pulse Width Modulator (PWM)
Register 31: PWM0 Counter (PWM0COUNT), offset 0x054
Register 32: PWM1 Counter (PWM1COUNT), offset 0x094
Register 33: PWM2 Counter (PWM2COUNT), offset 0x0D4
Register 34: PWM3 Counter (PWM3COUNT), offset 0x114
These registers contain the current value of the PWM counter. When this value matches the load
register, a pulse is output; this can drive the generation of a PWM signal (via the
PWMnGENA/PWMnGENB registers, see page 693 and page 696) or drive an interrupt or ADC trigger
(via the PWMnINTEN register, see page 684). A pulse with the same capabilities is generated when
this value is zero.
PWM0 Counter (PWM0COUNT)
Base 0x4002.8000
Offset 0x054
Type RO, reset 0x0000.0000
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
reserved
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Count
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit/Field
31:16
15:0
Name
reserved
Count
Type
RO
RO
Reset
0x00
0x00
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Counter Value
The current value of the counter.
690
November 17, 2011
Texas Instruments-Production Data