LM3S2776 Datasheet, PDF (262/785 Pages) Texas Instruments – Stellaris® LM3S2776 Microcontroller

Internal Memory
Important: The Flash memory resident registers can only have bits changed from 1 to 0 by user
programming and can only be committed once. After being committed, these registers
can only be restored to their factory default values only by performing the sequence
described in the section called “Recovering a "Locked" Device” on page 163. The mass
erase of the main Flash memory array caused by the sequence is performed prior to
restoring these registers.
In addition, the USER_REG0, USER_REG1, USER_REG2, USER_REG3, and USER_DBG registers
each use bit 31 (NW) to indicate that they have not been committed and bits in the register may be
changed from 1 to 0. Table 7-2 on page 262 provides the FMA address required for commitment of
each of the registers and the source of the data to be written when the FMC register is written with
a value of 0xA442.0008. After writing the COMT bit, the user may poll the FMC register to wait for
the commit operation to complete.
Table 7-2. User-Programmable Flash Memory Resident Registers
Register to be Committed
FMPRE0
FMPRE1
FMPPE0
FMPPE1
USER_REG0
USER_REG1
USER_REG2
USER_REG3
USER_DBG
FMA Value
0x0000.0000
0x0000.0002
0x0000.0001
0x0000.0003
0x8000.0000
0x8000.0001
0x8000.0002
0x8000.0003
0x7510.0000
Data Source
FMPRE0
FMPRE1
FMPPE0
FMPPE1
USER_REG0
USER_REG1
USER_REG2
USER_REG3
FMD
7.4 Register Map
Table 7-3 on page 262 lists the ROM Controller register and the Flash memory and control registers.
The offset listed is a hexadecimal increment to the register's address. The FMA, FMD, FMC, FCRIS,
FCIM, and FCMISC register offsets are relative to the Flash memory control base address of
0x400F.D000. The ROM and Flash memory protection register offsets are relative to the System
Control base address of 0x400F.E000.
Table 7-3. Flash Register Map
Offset Name
Type
Reset
Description
ROM Registers (System Control Offset)
0x0F0 RMCTL
R/W1C
-
Flash Memory Control Registers (Flash Control Offset)
0x000 FMA
R/W
0x0000.0000
0x004 FMD
R/W
0x0000.0000
0x008 FMC
R/W
0x0000.0000
0x00C FCRIS
RO
0x0000.0000
0x010 FCIM
R/W
0x0000.0000
ROM Control
Flash Memory Address
Flash Memory Data
Flash Memory Control
Flash Controller Raw Interrupt Status
Flash Controller Interrupt Mask
See
page
264
265
266
267
269
270
262
November 17, 2011
Texas Instruments-Production Data