MSP430F673X Datasheet, PDF (73/121 Pages) Texas Instruments – MIXED SIGNAL MICROCONTROLLER

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MSP430F673x
MSP430F672x
SLAS731A – DECEMBER 2011 – REVISED APRIL 2012
SD24_B, Performance (continued)
f_SD24 = 1 MHz, SD24OSRx = 256, SD24REFS = 1
PARAMETER
TEST CONDITIONS
V_CC
SD24GAIN: 1, with external reference (1.2 V)
3V
E_G
Gain error⁽¹⁾
SD24GAIN: 8, with external reference (1.2 V)
3V
SD24GAIN: 32, with external reference (1.2 V)
3V
Gain error temperature
ΔE_G/ΔT
coefficient⁽²⁾, internal
SD24GAIN: 1/8/32 (with internal reference)
3V
reference
ΔE_G/ΔV_CC
Gain error vs V_CC ⁽³⁾
SD24GAIN: 1
SD24GAIN: 8
SD24GAIN: 32
SD24GAIN: 1 (with Vdiff = 0V)
3V
E_OS[V]
Offset error⁽⁴⁾
SD24GAIN: 8
3V
SD24GAIN: 32
3V
SD24GAIN: 1 (with Vdiff = 0V)
3V
E_OS[FS]
Offset error⁽⁴⁾
SD24GAIN: 8
3V
SD24GAIN: 32
3V
SD24GAIN: 1
3V
ΔE_OS/ΔT
Offset error temperature
coefficient ⁽⁵⁾
SD24GAIN: 8
3V
SD24GAIN: 32
3V
ΔE_OS/ΔV_CC
Offset error vs V_CC ⁽⁶⁾
SD24GAIN: 1
SD24GAIN: 8
SD24GAIN: 32
SD24GAIN: 1
3V
CMRR,DC
Common mode rejection
at DC⁽⁷⁾
SD24GAIN: 8
3V
SD24GAIN: 32
3V
MIN TYP MAX UNIT
-1
+1
-2
+2 %
-2
+2
50 ppm/°C
0.15
0.15
%/V
0.4
2.3
0.73 mV
0.18
-0.2
0.2
-0.5
0.5 % FS
-0.5
0.5
1
0.15
uV/°C
0.1
600
100
uV/V
50
-110
-110
dB
-110
(1) The gain error E_G specifies the deviation of the actual gain G_act from the nominal gain G_nom: E_G = (G_act - G_nom)/G_nom. It covers process,
temperature and supply voltage variations.
(2) The gain error temperature coefficient ΔE_G/ ΔT specifies the variation of the gain error E_G over temperature (E_G(T) = (G_act(T) -
G_nom)/G_nom) using the box method (i.e. min. and max. values):
ΔE_G/ ΔT = (MAX(E_G(T)) - MIN(E_G(T) ) / (MAX(T) - MIN(T)) = (MAX(G_act(T)) - MIN(G_act(T)) / G_nom / (MAX(T) - MIN(T))
with T ranging from -40°C to +85°C.
(3) The gain error vs V_CC coefficient ΔE_G/ ΔV_CC specifies the variation of the gain error E_G over supply voltage (E_G(V_CC) = (G_act(V_CC) -
G_nom)/G_nom) using the box method (i.e. min. and max. values):
ΔE_G/ ΔV_CC = (MAX(E_G(V_CC)) - MIN(E_G(V_CC) ) / (MAX(V_CC) - MIN(V_CC)) = (MAX(G_act(V_CC)) - MIN(G_act(V_CC)) / G_nom / (MAX(V_CC) -
MIN(V_CC))
with V_CC ranging from 2.4V to 3.6V.
(4) The offset error E_OS is measured with shorted inputs in 2's complement mode with +100% FS = V_REF/G and -100% FS = -V_REF/G.
Conversion between E_OS [FS] and E_OS [V] is as follows: E_OS [FS] = E_OS [V]×G/V_REF; E_OS [V] = E_OS [FS]×V_REF/G.
(5) The offset error temperature coefficient ΔE_OS/ ΔT specifies the variation of the offset error E_OS over temperature using the box method
(i.e. min. and max. values):
ΔE_OS/ ΔT = (MAX(E_OS(T)) - MIN(E_OS(T) ) / (MAX(T) - MIN(T))
with T ranging from -40°C to +85°C.
(6) The offset error vs V_CC ΔE_OS/ ΔV_CC specifies the variation of the offset error E_OS over supply voltage using the box method (i.e. min.
and max. values):
ΔE_OS/ ΔV_CC = (MAX(E_OS(V_CC)) - MIN(E_OS(V_CC) ) / (MAX(V_CC) - MIN(V_CC))
with V_CC ranging from 2.4V to 3.6V.
(7) The DC CMRR specifies the change in the measured differential input voltage value when the common mode voltage varies:
DC CMRR = -20log(Δ_MAX/FSR) with Δ_MAX being the difference between the minium value and the maximum value measured when
sweeping the common mode voltage (for example, calculating with 16-bits FSR = 65536 a maximum change by 1 LSB results in -
20log(1/65536) ≈ -96 dB) .
The DC CMRR is measured with both inputs connected to the common mode voltage (i.e. no differential input signal is applied), and the
common mode voltage is swept from -1V to V_CC.
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