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MSP430F673X Datasheet, PDF (10/121 Pages) Texas Instruments – MIXED SIGNAL MICROCONTROLLER
MSP430F673x
MSP430F672x
SLAS731A – DECEMBER 2011 – REVISED APRIL 2012
www.ti.com
Table 5. Terminal Functions, MSP430F67xxIPZ (continued)
TERMINAL
NAME
XOUT
AUXVCC3
NO. I/O(1)
DESCRIPTION
PZ
25 O Output terminal for crystal oscillator
26
Auxiliary power supply AUXVCC3 for back up subsystem
P1.4/PM_UCA1RXD/
PM_UCA1SOMI/LCDREF/R13
General-purpose digital I/O with port interrupt and mappable secondary function
27 I/O Default mapping: eUSCI_A1 UART receive data; eUSCI_A1 SPI slave out/master in
External reference voltage input for regulated LCD voltage
Input/output port of third most positive analog LCD voltage (V3 or V4)
P1.5/PM_UCA1TXD/
PM_UCA1SIMO/R23
General-purpose digital I/O with port interrupt and mappable secondary function
28 I/O Default mapping: eUSCI_A1 UART transmit data; eUSCI_A1 SPI slave in/master out
Input/output port of second most positive analog LCD voltage (V2)
LCDCAP/R33
LCD capacitor connection
29 I/O Input/output port of most positive analog LCD voltage (V1)
CAUTION: This pin must be connected to DVSS if not used.
P8.4/TA1.0
30 I/O General-purpose digital I/O
Timer TA1 CCR0 capture: CCI0A input, compare: Out0 output
P8.5/TA1.1
COM0
COM1
COM2
COM3
31 I/O General-purpose digital I/O
Timer TA1 CCR1 capture: CCI1A input, compare: Out1 output
32 O LCD common output COM0 for LCD backplane
33 O LCD common output COM1 for LCD backplane
34 O LCD common output COM2 for LCD backplane
35 O LCD common output COM3 for LCD backplane
P1.6/PM_UCA0CLK/COM4
General-purpose digital I/O with port interrupt and mappable secondary function
36 I/O Default mapping: eUSCI_A0 clock input/output
LCD common output COM4 for LCD backplane
P1.7/PM_UCB0CLK/COM5
General-purpose digital I/O with port interrupt and mappable secondary function
37 I/O Default mapping: eUSCI_B0 clock input/output
LCD common output COM5 for LCD backplane
P2.0/PM_UCB0SOMI/
PM_UCB0SCL/COM6
General-purpose digital I/O with port interrupt and mappable secondary function
38 I/O Default mapping: eUSCI_B0 SPI slave out/master in; eUSCI_B0 I2C clock
LCD common output COM6 for LCD backplane
P2.1/PM_UCB0SIMO/
PM_UCB0SDA/COM7
General-purpose digital I/O with port interrupt and mappable secondary function
39 I/O Default mapping: eUSCI_B0 SPI slave in/master out; eUSCI_B0 I2C data
LCD common output COM7 for LCD backplane
P8.6/TA2.0
40 I/O General-purpose digital I/O
Timer TA2 CCR0 capture: CCI0A input, compare: Out0 output
P8.7/TA2.1
41 I/O General-purpose digital I/O
Timer TA2 CCR1 capture: CCI1A input, compare: Out1 output
P9.0/TACLK/RTCCLK
General-purpose digital I/O
42 I/O Timer clock input TACLK for TA0, TA1, TA2, TA3
RTCCLK clock output
P2.2/PM_UCA2RXD/
PM_UCA2SOMI
43 I/O General-purpose digital I/O with port interrupt and mappable secondary function
Default mapping: eUSCI_A2 UART receive data; eUSCI_A2 SPI slave out/master in
P2.3/PM_UCA2TXD/
PM_UCA2SIMO
44 I/O General-purpose digital I/O with port interrupt and mappable secondary function
Default mapping: eUSCI_A2 UART transmit data; eUSCI_A2 SPI slave in/master out
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