MSP430F673X Datasheet, PDF (15/121 Pages) Texas Instruments – MIXED SIGNAL MICROCONTROLLER

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MSP430F673x
MSP430F672x
SLAS731A – DECEMBER 2011 – REVISED APRIL 2012
TERMINAL
NAME
P1.5/PM_UCA1TXD/
PM_UCA1SIMO/R23
LCDCAP/R33
COM0
COM1
COM2
COM3
P1.6/PM_UCA0CLK/COM4
P1.7/PM_UCB0CLK/COM5
P2.0/PM_UCB0SOMI/
PM_UCB0SCL/COM6/S39
P2.1/PM_UCB0SIMO/
PM_UCB0SDA/COM7/S38
P2.2/PM_UCA2RXD/
PM_UCA2SOMI/S37
P2.3/PM_UCA2TXD/
PM_UCA2SIMO/S36
P2.4/PM_UCA1CLK/S35
P2.5/PM_UCA2CLK/S34
P2.6/PM_TA1.0/S33
P2.7/PM_TA1.1/S32
Table 6. Terminal Functions, MSP430F67xxIPN (continued)
NO. I/O⁽¹⁾
PN
DESCRIPTION
General-purpose digital I/O with port interrupt and mappable secondary function
25 I/O _{Default mapping: eUSCI_A1 UART transmit data; eUSCI_A1 SPI slave in/master out}
Input/output port of second most positive analog LCD voltage (V2)
LCD capacitor connection
26 I/O _{Input/output port of most positive analog LCD voltage (V1)}
CAUTION: This pin must be connected to DVSS if not used.
27 O LCD common output COM0 for LCD backplane
28 O LCD common output COM1 for LCD backplane
29 O LCD common output COM2 for LCD backplane
30 O LCD common output COM3 for LCD backplane
General-purpose digital I/O with port interrupt and mappable secondary function
31 I/O _{Default mapping: eUSCI_A0 clock input/output}
LCD common output COM4 for LCD backplane
General-purpose digital I/O with port interrupt and mappable secondary function
32 I/O _{Default mapping: eUSCI_B0 clock input/output}
LCD common output COM5 for LCD backplane
General-purpose digital I/O with port interrupt and mappable secondary function
33 I/O ^{Default mapping: eUSCI_B0 SPI slave out/master in; eUSCI_B0 I2C clock}
LCD common output COM6 for LCD backplane
LCD segment output S39
General-purpose digital I/O with port interrupt and mappable secondary function
34 I/O ^{Default mapping: eUSCI_B0 SPI slave in/master out; eUSCI_B0 I2C data}
LCD common output COM7 for LCD backplane
LCD segment output S38
General-purpose digital I/O with port interrupt and mappable secondary function
35 I/O _{Default mapping: eUSCI_A2 UART receive data; eUSCI_A2 SPI slave out/master in}
LCD segment output S37
General-purpose digital I/O with port interrupt and mappable secondary function
36 I/O _{Default mapping: eUSCI_A2 UART transmit data; eUSCI_A2 SPI slave in/master out}
LCD segment output S36
General-purpose digital I/O with port interrupt and mappable secondary function
37 I/O _{Default mapping: eUSCI_A1 clock input/output}
LCD segment output S35
General-purpose digital I/O with port interrupt and mappable secondary function
38 I/O _{Default mapping: eUSCI_A2 clock input/output}
LCD segment output S34
General-purpose digital I/O with port interrupt and mappable secondary function
39 I/O _{Default mapping: Timer TA1 capture CCR0: CCI0A input, compare: Out0 output}
LCD segment output S33
General-purpose digital I/O with port interrupt and mappable secondary function
40 I/O _{Default mapping: Timer TA1 capture CCR1: CCI1A input, compare: Out1 output}
LCD segment output S32
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