MSP430F673X Datasheet, PDF (43/121 Pages) Texas Instruments – MIXED SIGNAL MICROCONTROLLER

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MSP430F673x
MSP430F672x
SLAS731A – DECEMBER 2011 – REVISED APRIL 2012
Table 53. DMA Channel 1 Registers (Base Address: 0500h)
REGISTER DESCRIPTION
DMA channel 1 control
DMA channel 1 source address low
DMA channel 1 source address high
DMA channel 1 destination address low
DMA channel 1 destination address high
DMA channel 1 transfer size
REGISTER
DMA1CTL
20h
DMA1SAL
22h
DMA1SAH
24h
DMA1DAL
26h
DMA1DAH
28h
DMA1SZ
2Ah
OFFSET
Table 54. DMA Channel 2 Registers (Base Address: 0500h)
REGISTER DESCRIPTION
DMA channel 2 control
DMA channel 2 source address low
DMA channel 2 source address high
DMA channel 2 destination address low
DMA channel 2 destination address high
DMA channel 2 transfer size
REGISTER
DMA2CTL
30h
DMA2SAL
32h
DMA2SAH
34h
DMA2DAL
36h
DMA2DAH
38h
DMA2SZ
3Ah
OFFSET
Table 55. eUSCI_A0 Registers (Base Address: 05C0h)
REGISTER DESCRIPTION
eUSCI_A control word 0
eUSCI _A control word 1
eUSCI_A baud rate 0
eUSCI_A baud rate 1
eUSCI_A modulation control
eUSCI_A status
eUSCI_A receive buffer
eUSCI_A transmit buffer
eUSCI_A LIN control
eUSCI_A IrDA transmit control
eUSCI_A IrDA receive control
eUSCI_A interrupt enable
eUSCI_A interrupt flags
eUSCI_A interrupt vector word
REGISTER
UCA0CTLW0
UCA0CTLW1
UCA0BR0
UCA0BR1
UCA0MCTLW
UCA0STAT
UCA0RXBUF
UCA0TXBUF
UCA0ABCTL
UCA0IRTCTL
UCA0IRRCTL
UCA0IE
UCA0IFG
UCA0IV
OFFSET
00h
02h
06h
07h
08h
0Ah
0Ch
0Eh
10h
12h
13h
1Ah
1Ch
1Eh
Table 56. eUSCI_A1 Registers (Base Address:05E0h)
REGISTER DESCRIPTION
eUSCI_A control word 0
eUSCI _A control word 1
eUSCI_A baud rate 0
eUSCI_A baud rate 1
eUSCI_A modulation control
eUSCI_A status
eUSCI_A receive buffer
eUSCI_A transmit buffer
eUSCI_A LIN control
eUSCI_A IrDA transmit control
eUSCI_A IrDA receive control
eUSCI_A interrupt enable
REGISTER
UCA1CTLW0
UCA1CTLW1
UCA1BR0
UCA1BR1
UCA1MCTLW
UCA1STAT
UCA1RXBUF
UCA1TXBUF
UCA1ABCTL
UCA1IRTCTL
UCA1IRRCTL
UCA1IE
OFFSET
00h
02h
06h
07h
08h
0Ah
0Ch
0Eh
10h
12h
13h
1Ah
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