MSP430F673X Datasheet, PDF (42/121 Pages) Texas Instruments – MIXED SIGNAL MICROCONTROLLER

MSP430F673x
MSP430F672x
SLAS731A – DECEMBER 2011 – REVISED APRIL 2012
Table 50. 32-bit Hardware Multiplier Registers (Base Address: 04C0h)
REGISTER DESCRIPTION
16-bit operand 1 – multiply
16-bit operand 1 – signed multiply
16-bit operand 1 – multiply accumulate
16-bit operand 1 – signed multiply accumulate
16-bit operand 2
16 × 16 result low word
16 × 16 result high word
16 × 16 sum extension register
32-bit operand 1 – multiply low word
32-bit operand 1 – multiply high word
32-bit operand 1 – signed multiply low word
32-bit operand 1 – signed multiply high word
32-bit operand 1 – multiply accumulate low word
32-bit operand 1 – multiply accumulate high word
32-bit operand 1 – signed multiply accumulate low word
32-bit operand 1 – signed multiply accumulate high word
32-bit operand 2 – low word
32-bit operand 2 – high word
32 × 32 result 0 – least significant word
32 × 32 result 1
32 × 32 result 2
32 × 32 result 3 – most significant word
MPY32 control register 0
REGISTER
MPY
00h
MPYS
02h
MAC
04h
MACS
06h
OP2
08h
RESLO
0Ah
RESHI
0Ch
SUMEXT
0Eh
MPY32L
10h
MPY32H
12h
MPYS32L
14h
MPYS32H
16h
MAC32L
18h
MAC32H
1Ah
MACS32L
1Ch
MACS32H
1Eh
OP2L
20h
OP2H
22h
RES0
24h
RES1
26h
RES2
28h
RES3
2Ah
MPY32CTL0
2Ch
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OFFSET
DMA module control 0
DMA module control 1
DMA module control 2
DMA module control 3
DMA module control 4
DMA interrupt vector
Table 51. DMA General Control Registers (Base Address: 0500h)
REGISTER DESCRIPTION
REGISTER
DMACTL0
00h
DMACTL1
02h
DMACTL2
04h
DMACTL3
06h
DMACTL4
08h
DMAIV
0Eh
OFFSET
Table 52. DMA Channel 0 Registers (Base Address: 0500h)
REGISTER DESCRIPTION
DMA channel 0 control
DMA channel 0 source address low
DMA channel 0 source address high
DMA channel 0 destination address low
DMA channel 0 destination address high
DMA channel 0 transfer size
REGISTER
DMA0CTL
10h
DMA0SAL
12h
DMA0SAH
14h
DMA0DAL
16h
DMA0DAH
18h
DMA0SZ
1Ah
OFFSET
42
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