MSP430F673X Datasheet, PDF(14/121 Page) Texas Instruments

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MSP430F673X Datasheet, PDF (14/121 Pages) Texas Instruments – MIXED SIGNAL MICROCONTROLLER

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MSP430F673x

MSP430F672x

SLAS731A â DECEMBER 2011 â REVISED APRIL 2012

www.ti.com

SD0P0

SD0N0

SD1P0

SD1N0

SD2P0

SD2N0

VREF

AVSS

AVCC

VASYS

TERMINAL

NAME

P1.0/PM_TA0.0/VeREF-/A2

P1.1/PM_TA0.1/VeREF+/A1

P1.2/PM_UCA0RXD/

PM_UCA0SOMI/A0

P1.3/PM_UCA0TXD/

PM_UCA0SIMO/R03

AUXVCC2

AUXVCC1

VDSYS (3)

DVCC

DVSS

VCORE (4)

XIN

XOUT

AUXVCC3

P1.4/PM_UCA1RXD/

PM_UCA1SOMI/LCDREF/R13

Table 6. Terminal Functions, MSP430F67xxIPN

NO. I/O(1)

DESCRIPTION

I SD24_B positive analog input for converter 0(2)

I SD24_B negative analog input for converter 0(2)

I SD24_B positive analog input for converter 1(2)

I SD24_B negative analog input for converter 1(2)

I SD24_B positive analog input for converter 2(2) (not available on F672x devices)

I SD24_B negative analog input for converter 2(2) (not available on F672x devices)

I SD24_B external reference voltage

Analog ground supply

Analog power supply

Analog power supply selected between AVCC, AUXVCC1, AUXVCC2. Connect

recommended capacitor value of CVSYS (see Auxiliary Supplies - Recommended

Operating Conditions).

General-purpose digital I/O with port interrupt and mappable secondary function

Default mapping: Timer TA0 CCR0 capture: CCI0A input, compare: Out0 output

11 I/O Negative terminal for the ADC's reference voltage for an external applied reference

voltage

Analog input A2 - 10-bit ADC

General-purpose digital I/O with port interrupt and mappable secondary function

12 I/O Default mapping: Timer TA0 CCR1 capture: CCI1A input, compare: Out1 output

Positive terminal for the ADC reference voltage for an external applied reference voltage

Analog input A1 - 10-bit ADC

General-purpose digital I/O with port interrupt and mappable secondary function

13 I/O Default mapping: eUSCI_A0 UART receive data; eUSCI_A0 SPI slave out/master in

Analog input A0 - 10-bit ADC

General-purpose digital I/O with port interrupt and mappable secondary function

14 I/O Default mapping: eUSCI_A0 UART transmit data; eUSCI_A0 SPI slave in/master out

Input/output port of lowest analog LCD voltage (V5)

Auxiliary power supply AUXVCC2

Auxiliary power supply AUXVCC1

Digital power supply selected between DVCC, AUXVCC1, AUXVCC2. Connect

recommended capacitor value of CVSYS (see Auxiliary Supplies - Recommended

Operating Conditions).

Digital power supply

Digital ground supply

Regulated core power supply (internal use only, no external current loading)

21 I Input terminal for crystal oscillator

22 O Output terminal for crystal oscillator

Auxiliary power supply AUXVCC3 for back up subsystem

General-purpose digital I/O with port interrupt and mappable secondary function

24 I/O Default mapping: eUSCI_A1 UART receive data; eUSCI_A1 SPI slave out/master in

External reference voltage input for regulated LCD voltage

Input/output port of third most positive analog LCD voltage (V3 or V4)

(1) I = input, O = output

(2) It is recommended to short unused analog input pairs and connect them to analog ground.

(3) The pins VDSYS and DVSYS must be connected externally on board for proper device operation.

(4) VCORE is for internal use only. No external current loading is possible. VCORE should only be connected to the recommended

capacitor value, CVCORE.

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