SM470R1B1M-HT Datasheet, PDF (61/67 Pages) Texas Instruments – 16/32-BIT RISC FLASH MICROCONTROLLER

SM470R1B1M-HT
www.ti.com
SPNS155F – SEPTEMBER 2009 – REVISED AUGUST 2012
MULTI-BUFFERED A-TO-D CONVERTER (MibADC)
The multi-buffered A-to-D converter (MibADC) has a separate power bus for its analog circuitry that enhances
the A-to-D performance by preventing digital switching noise on the logic circuitry, which could be present on V
SS and V CC , from coupling into the A-to-D analog stage. All A-to-D specifications are given with respect to AD
REFLO unless otherwise noted.
Resolution
Monotonic
Output conversion code
10 bits (1024 values)
Assured
00h to 3FFh [00 for V_AI ≤ AD _REFLO ; 3FF for V_AI ≥ AD _REFHI ]
Table 13. MibADC Recommended Operating Conditions⁽¹⁾
AD_REFHI
AD_REFLO
V_AI
I_AIC
A-to-D high-voltage reference source
A-to-D low-voltage reference source
Analog input voltage
Analog input clamp current⁽²⁾
(V_AI < V_SSAD – 0.3 or V_AI > V_CCAD + 0.3)
MIN
V_SSAD
V_SSAD
V_SSAD – 0.3
–2
MAX
V_CCAD
V_CCAD
V_CCAD + 0.3
2
(1) For V_CCAD and V_SSAD recommended operating conditions, see the "Device Recommended Operating Conditions" table.
(2) Input currents into any ADC input channel outside the specified limits could affect conversion results of other channels.
UNIT
V
V
V
mA
Table 14. Operating Characteristics over Full Ranges of Recommended Operating Conditions^{(1)(2)(3) (4)}
PARAMETER
DESCRIPTION/CONDITIONS
MIN
TYP
MAX UNIT
R_I
Analog input resistance
C_I
Analog input capacitance
See Figure 24.
See Figure 24.
Conversion
Sampling
250
500 Ω
10 pF
30 pF
I_AIL
Analog input leakage current
See Figure 24.
–1
I_ADREFHI
AD_REFHI input current
AD_REFHI = 3.6 V, AD_REFLO = V_SSAD
CR
Conversion range over which
specified accuracy is maintained
AD_REFHI - AD_REFLO
3
1 µA
5 mA
3.6 V
E_DNL
Differential nonlinearity error
Difference between the actual step width
and the ideal value. See Figure 25.
±1.5 LSB
E_INL
Integral nonlinearity error
Maximum deviation from the best straight
line through the MibADC. MibADC transfer
characteristics, excluding the quantization
error. See Figure 26.
±2 LSB
E _TOT
Total error/Absolute accuracy
Maximum value of the difference between an
analog value and the ideal midstep value.
See Figure 27.
±2.5 LSB
(1) Not production tested.
(2) INL and DNL values are valid for a max ADCCLK frequency of 15 MHz. For frequencies greater than 15 MHz missing codes are
expected at higher temperature.
(3) V_CCAD = AD_REFHI
(4) 1 LSB = (AD_REFHI - AD_REFLO)/2¹⁰ for the MibADC
Copyright © 2009–2012, Texas Instruments Incorporated
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