SM470R1B1M-HT Datasheet, PDF (16/67 Pages) Texas Instruments – 16/32-BIT RISC FLASH MICROCONTROLLER

SM470R1B1M-HT
SPNS155F – SEPTEMBER 2009 – REVISED AUGUST 2012
www.ti.com
I2C2SDA
I2C2SCL
I2C3SDA
I2C3SCL
I2C4SDA
I2C4SCL
I2C5SDA
I2C5SCL
OSCIN
OSCOUT
PLLDIS
SCI1CLK
SCI1RX
SCI1TX
SCI2CLK
SCI2RX
SCI2TX
SCI3CLK
SCI3RX
SCI3TX
CLKOUT
PORRST
TERMINAL
NAME
Table 4. Terminal Functions (continued)
PAD
NO.
97
98
32
31
44
43
41
40
36
35
100
51
49
48
54
53
52
27
24
23
84
121
HFQ/
HKP
PIN
NO. ⁽⁴⁾
55
56
NC
NC
23
22
NC
NC
19
18
TYPE ^{(1) (2)}
CURRENT
OUTPUT
INTERNAL
PULLUP/
PULLDOWN ⁽³⁾
INTER-INTEGRATED CIRCUIT 2 (I2C2)
5-V tolerant
4 mA
INTER-INTEGRATED CIRCUIT 3 (I2C3)
5-V tolerant
4 mA
INTER-INTEGRATED CIRCUIT 4 (I2C4)
5-V tolerant
4 mA
INTER-INTEGRATED CIRCUIT 5 (I2C5)
5-V tolerant
4 mA
ZERO-PIN PHASE-LOCKED LOOP (ZPLL)
1.8 V
2 mA
57
3.3 V
IPD (20 µA)
SERIAL COMMUNICATIONS INTERFACE 1 (SCI1)
26
3.3 V
2 mA -z
IPD (20 µA)
25
5-V tolerant
4 mA
24
3.3 V
2 mA -z
IPU (20 µA)
SERIAL COMMUNICATIONS INTERFACE 2 (SCI2)
NC
3.3 V
2 mA -z
IPD (20 µA)
NC
5-V tolerant
4 mA
NC
3.3 V
2 mA -z
IPU (20 µA)
SERIAL COMMUNICATIONS INTERFACE 3 (SCI3)
14
3.3 V
2 mA -z
IPD (20 µA)
13
5-V tolerant
4 mA
12
3.3 V
2 mA -z
IPU (20 µA)
SYSTEM MODULE (SYS)
48
3.3 V
8 mA
68
3.3 V
IPD (20 µA)
DESCRIPTION
I2C2 serial data pin or GIO pin
I2C2 serial clock pin or GIO pin
I2C3 serial data pin or GIO pin
I2C3 serial clock pin or GIO pin
I2C4 serial data pin or GIO pin
I2C4 serial clock pin or GIO pin
I2C5 serial data pin or GIO pin
I2C5 serial clock pin or GIO pin
Crystal connection pin or external clock input
External crystal connection pin
Enable/disable the ZPLL. The ZPLL can be
bypassed and the oscillator becomes the
system clock. If not in bypass mode, TI
recommends that this pin be connected to
ground or pulled down to ground by an
external resistor.
SCI1 clock. SCI1CLK can be programmed
as a GIO pin.
SCI1 data receive. SCI1RX can be
programmed as a GIO pin.
SCI1 data transmit. SCI1TX can be
programmed as a GIO pin.
SCI2 clock. SCI2CLK can be programmed
as a GIO pin.
SCI2 data receive. SCI2RX can be
programmed as a GIO pin.
SCI2 data transmit. SCI2TX can be
programmed as a GIO pin.
SCI3 clock. SCI3CLK can be programmed
as a GIO pin.
SCI3 data receive. SCI3RX can be
programmed as a GIO pin.
SCI3 data transmit. SCI3TX can be
programmed as a GIO pin.
Bidirectional pin. CLKOUT can be
programmed as a GIO pin or the output of
SYSCLK, ICLK, or MCLK.
Input master chip power-up reset. External
V_CC monitor circuitry must assert a power-on
reset.
16
Submit Documentation Feedback
Copyright © 2009–2012, Texas Instruments Incorporated