LM3S1601 Datasheet, PDF (574/587 Pages) Texas Instruments – ARM and Thumb are registered trademarks and Cortex is a trademark

Register Quick Reference
31
30
29
28
27
26
25
24
15
14
13
12
11
10
9
8
SSIPeriphID3, type RO, offset 0xFEC, reset 0x0000.0001 (see page 457)
SSIPCellID0, type RO, offset 0xFF0, reset 0x0000.000D (see page 458)
SSIPCellID1, type RO, offset 0xFF4, reset 0x0000.00F0 (see page 459)
SSIPCellID2, type RO, offset 0xFF8, reset 0x0000.0005 (see page 460)
SSIPCellID3, type RO, offset 0xFFC, reset 0x0000.00B1 (see page 461)
Inter-Integrated Circuit (I²C) Interface
I²C Master
I2C 0 base: 0x4002.0000
I2C 1 base: 0x4002.1000
I2CMSA, type R/W, offset 0x000, reset 0x0000.0000
I2CMCS, type RO, offset 0x004, reset 0x0000.0000 (Reads)
I2CMCS, type WO, offset 0x004, reset 0x0000.0000 (Writes)
I2CMDR, type R/W, offset 0x008, reset 0x0000.0000
I2CMTPR, type R/W, offset 0x00C, reset 0x0000.0001
I2CMIMR, type R/W, offset 0x010, reset 0x0000.0000
I2CMRIS, type RO, offset 0x014, reset 0x0000.0000
I2CMMIS, type RO, offset 0x018, reset 0x0000.0000
I2CMICR, type WO, offset 0x01C, reset 0x0000.0000
I2CMCR, type R/W, offset 0x020, reset 0x0000.0000
23
22
21
20
19
18
17
16
7
6
5
4
3
2
1
0
PID3
CID0
CID1
CID2
CID3
SA
R/S
BUSBSY IDLE ARBLST DATACK ADRACK ERROR BUSY
ACK
STOP START RUN
DATA
TPR
IM
RIS
MIS
IC
SFE
MFE
LPBK
574
June 19, 2012
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