LM3S1601 Datasheet, PDF (516/587 Pages) Texas Instruments – ARM and Thumb are registered trademarks and Cortex is a trademark

Signal Tables
Table 16-1. Signals by Pin Number (continued)
Pin Number
Pin Name
Pin Type Buffer Type^a Description
69
GND
-
Power Ground reference for logic and I/O pins.
PB2
I/O
TTL
GPIO port B bit 2.
70
I2C0SCL
I/O
OD
I²C module 0 clock.
PB3
I/O
TTL
GPIO port B bit 3.
71
I2C0SDA
I/O
OD
I²C module 0 data.
PE0
I/O
TTL
GPIO port E bit 0.
72
SSI1Clk
I/O
TTL
SSI module 1 clock
PE1
I/O
TTL
GPIO port E bit 1.
73
SSI1Fss
I/O
TTL
SSI module 1 frame signal
PE2
I/O
TTL
GPIO port E bit 2.
74
SSI1Rx
I
TTL
SSI module 1 receive
PE3
I/O
TTL
GPIO port E bit 3.
75
SSI1Tx
O
TTL
SSI module 1 transmit
76
CMOD1
I
TTL
CPU Mode bit 1. Input must be set to logic 0 (grounded); other
encodings reserved.
PC3
I/O
TTL
GPIO port C bit 3.
77
SWO
O
TTL
JTAG TDO and SWO.
TDO
O
TTL
JTAG TDO and SWO.
PC2
I/O
TTL
GPIO port C bit 2.
78
TDI
I
TTL
JTAG TDI.
PC1
I/O
TTL
GPIO port C bit 1.
79
SWDIO
I/O
TTL
JTAG TMS and SWDIO.
TMS
I/O
TTL
JTAG TMS and SWDIO.
PC0
I/O
TTL
GPIO port C bit 0.
80
SWCLK
I
TTL
JTAG/SWD CLK.
TCK
I
TTL
JTAG/SWD CLK.
81
VDD
-
Power Positive supply for I/O and some logic.
82
GND
-
Power Ground reference for logic and I/O pins.
83
PH3
I/O
TTL
GPIO port H bit 3.
84
PH2
I/O
TTL
GPIO port H bit 2.
PH1
I/O
TTL
GPIO port H bit 1.
85
CCP7
I/O
TTL
Capture/Compare/PWM 7.
PH0
I/O
TTL
GPIO port H bit 0.
86
CCP6
I/O
TTL
Capture/Compare/PWM 6.
87
GND
-
Power Ground reference for logic and I/O pins.
88
VDD25
-
Power Positive supply for most of the logic function, including the
processor core and most peripherals.
PB7
I/O
TTL
GPIO port B bit 7.
89
TRST
I
TTL
JTAG TRST.
PB6
I/O
TTL
GPIO port B bit 6.
90
C0+
I
Analog Analog comparator 0 positive input.
516
June 19, 2012
Texas Instruments-Production Data