LM3S1601 Datasheet, PDF (436/587 Pages) Texas Instruments – ARM and Thumb are registered trademarks and Cortex is a trademark

Synchronous Serial Interface (SSI)
Table 12-3. SSI Register Map
Offset Name
Type
0x000 SSICR0
0x004 SSICR1
0x008 SSIDR
0x00C SSISR
0x010 SSICPSR
0x014 SSIIM
0x018 SSIRIS
0x01C SSIMIS
0x020 SSIICR
0xFD0 SSIPeriphID4
0xFD4 SSIPeriphID5
0xFD8 SSIPeriphID6
0xFDC SSIPeriphID7
0xFE0 SSIPeriphID0
0xFE4 SSIPeriphID1
0xFE8 SSIPeriphID2
0xFEC SSIPeriphID3
0xFF0 SSIPCellID0
0xFF4 SSIPCellID1
0xFF8 SSIPCellID2
0xFFC SSIPCellID3
R/W
R/W
R/W
RO
R/W
R/W
RO
RO
W1C
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
Description
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0003
0x0000.0000
0x0000.0000
0x0000.0008
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0022
0x0000.0000
0x0000.0018
0x0000.0001
0x0000.000D
0x0000.00F0
0x0000.0005
0x0000.00B1
SSI Control 0
SSI Control 1
SSI Data
SSI Status
SSI Clock Prescale
SSI Interrupt Mask
SSI Raw Interrupt Status
SSI Masked Interrupt Status
SSI Interrupt Clear
SSI Peripheral Identification 4
SSI Peripheral Identification 5
SSI Peripheral Identification 6
SSI Peripheral Identification 7
SSI Peripheral Identification 0
SSI Peripheral Identification 1
SSI Peripheral Identification 2
SSI Peripheral Identification 3
SSI PrimeCell Identification 0
SSI PrimeCell Identification 1
SSI PrimeCell Identification 2
SSI PrimeCell Identification 3
See
page
437
439
441
442
444
445
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
12.6
Register Descriptions
The remainder of this section lists and describes the SSI registers, in numerical order by address
offset.
436
June 19, 2012
Texas Instruments-Production Data