LM3S1601 Datasheet, PDF(527/587 Page) Texas Instruments – ARM and Thumb are registered trademarks and Cortex is a trademark

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LM3S1601 Datasheet, PDF (527/587 Pages) Texas Instruments – ARM and Thumb are registered trademarks and Cortex is a trademark

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StellarisÂ® LM3S1601 Microcontroller

Table 16-5. Signals by Pin Number (continued)

Pin Number

Pin Name

Pin Type Buffer Typea Description

PC1

I/O

TTL

GPIO port C bit 1.

B9

SWDIO

I/O

TTL

JTAG TMS and SWDIO.

TMS

I/O

TTL

JTAG TMS and SWDIO.

B10

CMOD1

I

TTL

CPU Mode bit 1. Input must be set to logic 0 (grounded); other

encodings reserved.

PE2

I/O

TTL

GPIO port E bit 2.

B11

SSI1Rx

I

TTL

SSI module 1 receive

PE1

B12

SSI1Fss

I/O

TTL

GPIO port E bit 1.

I/O

TTL

SSI module 1 frame signal

C1

PE7

I/O

TTL

GPIO port E bit 7.

PE6

I/O

TTL

GPIO port E bit 6.

C2

C1o

O

TTL

Analog comparator 1 output.

C3

VDD25

-

Power Positive supply for most of the logic function, including the

processor core and most peripherals.

C4

GND

-

Power Ground reference for logic and I/O pins.

C5

GND

-

Power Ground reference for logic and I/O pins.

VDDA

C6

-

Power The positive supply for the analog circuits (ADC, Analog

Comparators, etc.). These are separated from VDD to minimize

the electrical noise contained on VDD from affecting the analog

functions. VDDA pins must be supplied with a voltage that meets

the specification in âRecommended DC Operating

Conditionsâ on page 541, regardless of system implementation.

VDDA

C7

-

Power The positive supply for the analog circuits (ADC, Analog

Comparators, etc.). These are separated from VDD to minimize

the electrical noise contained on VDD from affecting the analog

functions. VDDA pins must be supplied with a voltage that meets

the specification in âRecommended DC Operating

Conditionsâ on page 541, regardless of system implementation.

PH1

I/O

TTL

GPIO port H bit 1.

C8

CCP7

I/O

TTL

Capture/Compare/PWM 7.

PH0

I/O

TTL

GPIO port H bit 0.

C9

CCP6

I/O

TTL

Capture/Compare/PWM 6.

C10

PG7

I/O

TTL

GPIO port G bit 7.

PB2

C11

I2C0SCL

I/O

TTL

GPIO port B bit 2.

I/O

OD

I2C module 0 clock.

PB3

C12

I2C0SDA

I/O

TTL

GPIO port B bit 3.

I/O

OD

I2C module 0 data.

D1

PE4

I/O

TTL

GPIO port E bit 4.

D2

PE5

I/O

TTL

GPIO port E bit 5.

D3

VDD25

-

Power Positive supply for most of the logic function, including the

processor core and most peripherals.

D10

PH3

I/O

TTL

GPIO port H bit 3.

D11

PH2

I/O

TTL

GPIO port H bit 2.

PB1

D12

CCP2

I/O

TTL

GPIO port B bit 1.

I/O

TTL

Capture/Compare/PWM 2.

June 19, 2012

527

Texas Instruments-Production Data

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