LM3S1601 Datasheet, PDF (3/587 Pages) Texas Instruments – ARM and Thumb are registered trademarks and Cortex is a trademark

Stellaris^® LM3S1601 Microcontroller
Table of Contents
Revision History ............................................................................................................................. 20
About This Document .................................................................................................................... 25
Audience .............................................................................................................................................. 25
About This Manual ................................................................................................................................ 25
Related Documents ............................................................................................................................... 25
Documentation Conventions .................................................................................................................. 26
1
1.1
1.2
1.3
1.4
1.4.1
1.4.2
1.4.3
1.4.4
1.4.5
1.4.6
1.4.7
1.4.8
Architectural Overview .......................................................................................... 28
Product Features .......................................................................................................... 28
Target Applications ........................................................................................................ 34
High-Level Block Diagram ............................................................................................. 35
Functional Overview ...................................................................................................... 37
ARM Cortex™-M3 ......................................................................................................... 37
Motor Control Peripherals .............................................................................................. 38
Analog Peripherals ........................................................................................................ 38
Serial Communications Peripherals ................................................................................ 38
System Peripherals ....................................................................................................... 40
Memory Peripherals ...................................................................................................... 40
Additional Features ....................................................................................................... 41
Hardware Details .......................................................................................................... 42
2
2.1
2.2
2.2.1
2.2.2
2.2.3
2.2.4
2.3
2.3.1
2.3.2
2.3.3
2.3.4
2.3.5
2.3.6
2.4
2.4.1
2.4.2
2.4.3
2.4.4
2.4.5
2.4.6
2.4.7
2.5
2.5.1
2.5.2
2.5.3
The Cortex-M3 Processor ...................................................................................... 43
Block Diagram .............................................................................................................. 44
Overview ...................................................................................................................... 45
System-Level Interface .................................................................................................. 45
Integrated Configurable Debug ...................................................................................... 45
Trace Port Interface Unit (TPIU) ..................................................................................... 46
Cortex-M3 System Component Details ........................................................................... 46
Programming Model ...................................................................................................... 47
Processor Mode and Privilege Levels for Software Execution ........................................... 47
Stacks .......................................................................................................................... 47
Register Map ................................................................................................................ 48
Register Descriptions .................................................................................................... 49
Exceptions and Interrupts .............................................................................................. 62
Data Types ................................................................................................................... 62
Memory Model .............................................................................................................. 62
Memory Regions, Types and Attributes ........................................................................... 64
Memory System Ordering of Memory Accesses .............................................................. 64
Behavior of Memory Accesses ....................................................................................... 64
Software Ordering of Memory Accesses ......................................................................... 65
Bit-Banding ................................................................................................................... 66
Data Storage ................................................................................................................ 68
Synchronization Primitives ............................................................................................. 69
Exception Model ........................................................................................................... 70
Exception States ........................................................................................................... 71
Exception Types ............................................................................................................ 71
Exception Handlers ....................................................................................................... 74
June 19, 2012
3
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