LM3S1601 Datasheet, PDF (24/587 Pages) Texas Instruments – ARM and Thumb are registered trademarks and Cortex is a trademark

Revision History
Table 1. Revision History (continued)
Date
Revision
Description
■ Bit 31 of the DC3 register was incorrectly described in prior versions of the data sheet. A reset of
1 indicates that an even CCP pin is present and can be used as a 32-KHz input clock.
■ Values for I_{DD_HIBERNATE} were added to the "Detailed Power Specifications" table in the "Electrical
Characteristics" chapter.
■ The "Hibernation Module DC Electricals" table was added to the "Electrical Characteristics" chapter.
■ The T_VDDRISE parameter in the "Reset Characteristics" table in the "Electrical Characteristics" chapter
was changed from a max of 100 to 250.
■ The maximum value on Core supply voltage (V_DD25) in the "Maximum Ratings" table in the "Electrical
Characteristics" chapter was changed from 4 to 3.
■ The operational frequency of the internal 30-kHz oscillator clock source is 30 kHz ± 50% (prior data
sheets incorrectly noted it as 30 kHz ± 30%).
■ A value of 0x3 in bits 5:4 of the MISC register (OSCSRC) indicates the 30-KHz internal oscillator is
the input source for the oscillator. Prior data sheets incorrectly noted 0x3 as a reserved value.
■ The reset for bits 6:4 of the RCC2 register (OSCSRC2) is 0x1 (IOSC). Prior data sheets incorrectly
noted the reset was 0x0 (MOSC).
■ Two figures on clock source were added to the "Hibernation Module":
– Clock Source Using Crystal
– Clock Source Using Dedicated Oscillator
■ The following notes on battery management were added to the "Hibernation Module" chapter:
– Battery voltage is not measured while in Hibernate mode.
– System level factors may affect the accuracy of the low battery detect circuit. The designer
should consider battery type, discharge characteristics, and a test load during battery voltage
measurements.
■ A note on high-current applications was added to the GPIO chapter:
For special high-current applications, the GPIO output buffers may be used with the following
restrictions. With the GPIO pins configured as 8-mA output drivers, a total of four GPIO outputs may
be used to sink current loads up to 18 mA each. At 18-mA sink current loading, the VOL value is
specified as 1.2 V. The high-current GPIO package pins must be selected such that there are only
a maximum of two per side of the physical package or BGA pin group with the total number of
high-current GPIO outputs not exceeding four for the entire package.
■ A note on Schmitt inputs was added to the GPIO chapter:
Pins configured as digital inputs are Schmitt-triggered.
■ The Buffer type on the WAKE pin changed from OD to - in the Signal Tables.
■ The "Differential Sampling Range" figures in the ADC chapter were clarified.
■ The last revision of the data sheet (revision 2550) introduced two errors that have now been corrected:
– The LQFP pin diagrams and pin tables were missing the comparator positive and negative input
pins.
– The base address was listed incorrectly in the FMPRE0 and FMPPE0 register bit diagrams.
■ Additional minor data sheet clarifications and corrections.
March 2008
2550 Started tracking revision history.
24
June 19, 2012
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