LM3S1601 Datasheet, PDF (518/587 Pages) Texas Instruments – ARM and Thumb are registered trademarks and Cortex is a trademark

Signal Tables
Table 16-2. Signals by Signal Name (continued)
Pin Name
Pin Number Pin Type Buffer Type^a Description
GND
9
-
Power Ground reference for logic and I/O pins.
15
21
33
39
45
54
57
63
69
82
87
94
GNDA
4
-
Power The ground reference for the analog circuits ( Analog
97
Comparators, etc.). These are separated from GND to
minimize the electrical noise contained on VDD from affecting
the analog functions.
HIB
I2C0SCL
I2C0SDA
I2C1SCL
I2C1SDA
51
O
OD
An open-drain output with internal pull-up that indicates the
processor is in Hibernate mode.
70
I/O
OD
I²C module 0 clock.
71
I/O
OD
I²C module 0 data.
34
I/O
OD
I²C module 1 clock.
35
I/O
OD
I²C module 1 data.
LDO
7
-
Power Low drop-out regulator output voltage. This pin requires an
external capacitor between the pin and GND of 1 µF or
greater. The LDO pin must also be connected to the VDD25
pins at the board level in addition to the decoupling
capacitor(s).
OSC0
48
I
Analog Main oscillator crystal input or an external clock reference
input.
OSC1
49
O
Analog Main oscillator crystal output. Leave unconnected when using
a single-ended clock source.
PA0
26
I/O
TTL
GPIO port A bit 0.
PA1
27
I/O
TTL
GPIO port A bit 1.
PA2
28
I/O
TTL
GPIO port A bit 2.
PA3
29
I/O
TTL
GPIO port A bit 3.
PA4
30
I/O
TTL
GPIO port A bit 4.
PA5
31
I/O
TTL
GPIO port A bit 5.
PA6
34
I/O
TTL
GPIO port A bit 6.
PA7
35
I/O
TTL
GPIO port A bit 7.
PB0
66
I/O
TTL
GPIO port B bit 0.
PB1
67
I/O
TTL
GPIO port B bit 1.
PB2
70
I/O
TTL
GPIO port B bit 2.
PB3
71
I/O
TTL
GPIO port B bit 3.
PB4
92
I/O
TTL
GPIO port B bit 4.
PB5
91
I/O
TTL
GPIO port B bit 5.
PB6
90
I/O
TTL
GPIO port B bit 6.
PB7
89
I/O
TTL
GPIO port B bit 7.
518
June 19, 2012
Texas Instruments-Production Data