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TIC10024-Q1 Datasheet, PDF (40/81 Pages) Texas Instruments – 24-Input Multiple Switch Detection Interface (MSDI) Device With Adjustable Wetting Current for Automotive Systems
TIC10024-Q1
SCPS268 – SEPTEMBER 2017
www.ti.com
Bit
Field
0
POR
Table 8. INT_STAT Register Field Descriptions (continued)
Type
RC
Reset
1h
Description
0h = no Power-On-Reset (POR) event occurred or the status got
cleared after a READ command was executed on the INT_STAT
register.
1h = Power-On-Reset (POR) event occurred.
The Power-On-Reset (POR) interrupt bit indicates whether a reset
event has occurred. A reset event sets the registers to their default
values and re-initializes the device state machine. This bit is
asserted after a successful power-on-reset, hardware reset, or
software reset. The value of this register bit is mirrored to the POR
SPI status flag.
40
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