DS90UB924-Q1 Datasheet, PDF (33/62 Pages) Texas Instruments – 5-MHz to 96-MHz 24-bit Color FPD-Link III to OpenLDI Deserializer With Bidirectional Control Channel

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DS90UB924-Q1
SNLS512 – APRIL 2016
7.5 Programming
The DS90UB924-Q1 may also be configured by the use of an I²C compatible serial control bus. Multiple devices
may share the serial control bus (up to 10 device addresses supported). The device address is set via a resistor
divider (R1 and R2 — see Figure 33) connected to the IDx pin.
VDD33
HOST
SCL
SDA
VDD33
R1
VR2
IDx
4.7kQ
4.7kQ
R2
DES
SCL
SDA
To other
Devices
Copyright © 2016, Texas Instruments Incorporated
Figure 33. Serial Control Bus Connection
The serial control bus consists of two signals and an address configuration pin. SCL is a Serial Bus Clock
Input/Output. SDA is the Serial Bus Data Input/Output signal. Both SCL and SDA signals require an external
pullup resistor to V_DD33 or V_DDIO = 3.0 V to 3.6 V. For most applications, a 4.7-kΩ pullup resistor to V_DD33 is
recommended. The signals are either pulled HIGH, or driven LOW.
The IDx pin configures the control interface to one of 10 possible device addresses. A pullup resistor and a
pulldown resistor is used to set the appropriate voltage ratio between the IDx input pin (V_R2) and V_DD33, each
ratio corresponding to a specific device address. See Table 8.
NO.
IDEAL RATIO
V_R2 / V_DD33
1
0
2
0.995
3
1.137
4
1.282
5
1.413
6
1.570
7
1.707
8
1.848
9
1.997
10
2.535
Table 7. Serial Control Bus Addresses for IDx
IDEAL V_R2
(V)
0
0.302
0.345
0.388
0.428
0.476
0.517
0.560
0.605
0.768
SUGGESTED
RESISTOR R1 kΩ
(1% tol)
OPEN
226
215
200
187
174
154
150
137
90.9
SUGGESTED
RESISTOR R2 kΩ
(1% tol)
40.2 or >10
97.6
113
127
140
158
165
191
210
301
ADDRESS 7'b
0x2C
0x33
0x34
0x35
0x36
0x37
0x38
0x39
0x3A
0x3B
ADDRESS 8'b
0x58
0x66
0x68
0x6A
0x6C
0x6E
0x70
0x72
0x74
0x76
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