DS90UR124-Q1 Datasheet, PDF (32/41 Pages) Texas Instruments – 5-MHz to 43-MHz DC-Balanced 24-Bit FPD-Link II Serializer and Deserializer Chipset

DS90UR124-Q1, DS90UR241-Q1
SNLS231O – SEPTEMBER 2006 – REVISED APRIL 2015
11.2 Layout Examples
LVCMOS
INPUTS
HIGH
SPEED
SERIAL
STREAM
Figure 33. Example DS90UR241-Q1 EMC Layout
AC DECOUPLING
CAPS PLACEMENT
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Figure 34. DS90UR241-Q1 EMC EVM Layer 4
HIGH
SPEED
SERIAL
INPUTS
LVCMOS
OUTPUTS
Figure 35. Example DS90UR124-Q1 EMC Layout
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