OMAP4460 Datasheet, PDF (317/444 Pages) Texas Instruments – Multimedia Device

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OMAP4460
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SWPS046A – JANUARY 2012
Table 5-113. HSI1 Timing Requirements—Receive Mode—1.8 V⁽¹⁾ (continued)
NO.
PARAMETER
HSI2
t_d(DAT-FLAG)
Delay time, hsi_cadata transition to hsi_caflag
transition
t_d(FLAG-DAT)
Delay time, hsi_caflag transition to hsi_cadata
transition
HSI3
t_d(DAT)
Duration time, hsi_cadata low level or high level
duration
t_d(FLAG)
Duration time, hsi_caflag low level or high level
duration
HSI4
t_R
HSI5
t_F
Rise time, hsi_cadata and hsi_caflag
Fall time, hsi_cadata and hsi_caflag
(1) See DM Operating Condition Addendum for CORE OPP voltages.
OPP100, OPP119
MIN
MAX
1.56
1.56
2.56
2.56
1.0
1.5
1.0
1.3
OPP50
MIN
MAX
3.13
3.13
5.13
5.13
1.0
1.5
1.0
1.3
Table 5-114. HSI1 Switching Characteristics—Transmit Mode—1.8 V^(1)(2)(3)
UNIT
ns
ns
ns
ns
ns
ns
NO.
PARAMETER
HSI1
HSI6
1 / t_c(data,flag)
1 / t_c(NomBit)
t_d(DAT-FLAG)
Frequency, hsi_acdata, hsi_acflag
Frequency, nominal bit time
Delay time, hsi_acdata transition to his_acflag
transition
t_d(FLAG-DAT)
Delay time, hsi_acflag transition to hsi_acdata
transition
HSI7
t_d(DAT)
Duration time, hsi_acdata low level or high level
duration
t_d(FLAG)
Duration time, hsi_acflag low level or high level
duration
HSI8
t_R
HSI9
t_F
Rise time, hsi_acdata and hsi_acflag
Fall time, hsi_acdata and hsi_acflag
(1) Considered capacitive load is equal to 5 pF.
(2) P = t_c(NomBit) time in ns
(3) See DM Operating Condition Addendum for CORE OPP voltages.
OPP100, OPP119
MIN
MAX
96
192
2.08 P + 0.78
OPP50
MIN
MAX
48
96
4.17 P + 1.91
UNIT
MHz
MHz
ns
2.08 P + 0.78 4.17 P + 1.91
ns
2.57 P + 1.18 4.69 P + 2.41
ns
2.57 P + 1.18 4.69 P + 2.41
ns
0.40
1.70
0.60
1.70
ns
0.50
1.50
0.60
1.50
ns
5.6.7.2 High-Speed Synchronous Interface 2
5.6.7.2.1 HSI2 Transmit and Receive Modes—1.2 V
Table 5-116 and Table 5-117 assume testing over the recommended operating conditions and electrical
characteristic conditions below (see Figure 5-80 and Figure 5-81).
Table 5-115. HSI2 Timing Conditions—Transmit and Receive Modes—1.2 V^(1)(2)(4)
SYSTEM CONDITION PARAMETER
Input Conditions
t_R
Input signal rise time
t_F
Input signal fall time
PCB Conditions⁽³⁾
Number of external peripherals
Far end load
Trace length
Characteristics impedance
VALUE
MIN
MAX
1000
1000
1100
1100
1
5
4
35
50
UNIT
ps
ps
pF
cm
Ω
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Timing Requirements and Switching Characteristics 317
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