OMAP4460 Datasheet, PDF (18/444 Pages) Texas Instruments – Multimedia Device

OMAP4460
Public Version
SWPS046A – JANUARY 2012
www.ti.com
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Low- / Full-Speed USBB2 Switching Characteristics—Bidirectional Standard 4-pin Mode—1.8 V .................. 339
Low- / Full-Speed USBB2 Timing Conditions—Bidirectional TLL 4-pin Mode—1.8 V................................. 340
Low- / Full-Speed USBB2 Timing Requirements—Bidirectional TLL 4-pin Mode—1.8 V............................. 340
Low- / Full-Speed USBB2 Switching Characteristics—Bidirectional TLL 4-pin Mode—1.8 V ........................ 340
Low- / Full-Speed USBB2 Timing Conditions—Bidirectional Standard 3-pin Mode—1.8 V .......................... 341
Low- / Full-Speed USBB2 Timing Requirements—Bidirectional Standard 3-pin Mode—1.8 V ...................... 341
Low- / Full-Speed USBB2 Switching Characteristics—Bidirectional Standard 3-pin Mode—1.8 V .................. 342
Low- / Full-Speed USBB2 Timing Conditions—Bidirectional TLL 3-pin Mode—1.8 V................................. 342
Low- / Full-Speed USBB2 Timing Requirements—Bidirectional TLL 3-pin Mode—1.8 V............................. 343
Low- / Full-Speed USBB2 Switching Characteristics—Bidirectional TLL 3-pin Mode—1.8 V ........................ 343
Low- / Full-Speed USBB2 Timing Conditions—Bidirectional 2-pin Mode—1.8 V ...................................... 343
Low- / Full-Speed USBB2 Timing Requirements—Bidirectional 2-pin Mode—1.8 V .................................. 344
High-Speed USBB2 Timing Conditions—ULPI SDR Mode ............................................................... 344
High-Speed USBB2 Timing Requirements—ULPI SDR Mode—Slave Mode .......................................... 345
High-Speed USBB2 Switching Characteristics—ULPI SDR Mode—Slave Mode...................................... 345
High-Speed USBB2 Timing Conditions—ULPI TLL Mode—Master Mode.............................................. 346
High-Speed USBB2 Timing Requirements—ULPI TLL Mode—Master Mode.......................................... 346
High-Speed USBB2 Switching Characteristics—ULPI TLL Mode—Master Mode ..................................... 347
High-Speed USBB2—HSIC DDR Timing Conditions—1.2 V ............................................................. 348
High-Speed USBB2 Timing Requirements—HSIC DDR Receive Mode—1.2 V ....................................... 348
High-Speed USBB2 Switching Characteristics—HSIC DDR Transmit Mode—1.2 V.................................. 348
I²C and SmartReflex—Standard and Fast Modes.......................................................................... 350
I²C and SmartReflex—High-Speed Mode ................................................................................... 351
I²C and SmartReflex Correspondence Standard vs Data Manual Timing References ................................ 352
HDQ/1-Wire Timing Requirements—HDQ Mode ........................................................................... 352
HDQ Sampling Cases.......................................................................................................... 353
HDQ/1-Wire Switching Characteristics—HDQ Mode ...................................................................... 353
HDQ/1-Wire Timing Requirements—1-Wire Mode ......................................................................... 354
HDQ/1-Wire Switching Characteristics—1-Wire Mode .................................................................... 354
UART IO Settings References ................................................................................................ 356
UART Switching Characteristics .............................................................................................. 359
UART3 IrDA Signaling Rate and Pulse Duration with 3/16^th Encoding—Receive Mode.............................. 363
UART3 IrDA Rise and Fall Times—Receive Mode ........................................................................ 363
UART3 IrDA Signaling Rate and Pulse Duration with 3/16^th Encoding—Transmit Mode ............................. 364
MMC/SD/SDIO 1 Interface Timing Conditions—SD Identification and Standard SD Mode .......................... 365
MMC/SD/SDIO 1 Interface Timing Requirements—SD Identification and Standard SD Mode ...................... 366
MMC/SD/SDIO 1 Interface Switching Characteristics—SD Identification and Standard SD Mode .................. 366
MMC/SD/SDIO 1 Interface Timing Conditions—High-Speed SD Mode ................................................. 367
MMC/SD/SDIO 1 Interface Timing Requirements—High-Speed SD Mode............................................. 368
MMC/SD/SDIO 1 Interface Switching Characteristics—High-Speed SD Mode ........................................ 368
MMC/SD/SDIO 1 Interface Timing Conditions—High-Speed SDR50 Mode ............................................ 370
MMC/SD/SDIO 1 Interface Timing Requirements—High-Speed SDR50 Mode ........................................ 370
MMC/SD/SDIO 1 Interface Switching Characteristics—High-Speed SDR50 Mode ................................... 371
MMC/SD/SDIO 1 Interface Timing Conditions—High-Speed SD Mode—DDR50 ..................................... 372
MMC/SD/SDIO 1 Interface Timing Requirements—High-Speed SD Mode—DDR50 ................................. 372
MMC/SD/SDIO 1 Interface Switching Characteristics—High-Speed SD Mode—DDR50............................. 372
MMC/SD/SDIO 2 Interface Timing Conditions—High-Speed SDR JC64 Mode........................................ 374
MMC/SD/SDIO 2 Interface Timing Requirements—High-Speed SDR JC64 Mode.................................... 374
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