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OMAP4460 Datasheet, PDF (143/444 Pages) Texas Instruments – Multimedia Device
Public Version
OMAP4460
www.ti.com
SWPS046A – JANUARY 2012
Table 3-10. I2C DC Electrical Characteristics (continued)
PARAMETER
MIN
NOM
MAX
UNIT
CI
Input capacitance
VOL3 Output low-level threshold open-drain at
0
3-mA sink current
10
pF
0.2 * vdds_dv_y(2)
V
tOF
Output fall time from VIHmin to VILmax with
10
a capacitive load from 5 pF to 100 pF at
3-mA sink current
40
ns
Output fall time from VIHmin to VILmax with
20
a capacitive load of 400 pF at 3-mA sink
current
80
ns
tOR
Output rise time from VILmax to VIHmin with
10
a capacitive load from 5 pF to 80 pF with
internal pullup enabled
40
ns
RINPU
Internal pullup
resistance for a given
load range
LB[1:0] = 00
LB[1:0] = 01
1.26
1.66 (for a load in the
2.5
kΩ
range of 5 pF to 12 pF)
0.7
0.92 (for a load in the
1.39
range of 12 pF to 25 pF)
LB[1:0] = 10
0.38
0.5 (for a load in the
0.75
range of 25 pF to 50 pF)
LB[1:0] = 11
Non-I2C Mode (Standard LVCMOS mode)
0.23
0.3 (for a load in the
0.45
range of 50 pF to 80 pF)
1.2-V Mode
VIH
Input high-level threshold
VIL
Input low-level threshold
II
Input current at each I/O pin with an input
voltage between 0.1 * vdds_dv_y(2) to 0.9
* vdds_dv_y(2)
0.7 * vdds_dv_y(2)
–0.5
–10
vdds_dv_y(2) + 0.5
V
0.3 * vdds_dv_y(2)
V
10
µA
CI
Input capacitance
VOH
Output high-level threshold at 4-mA sink 0.75 * vdds_dv_y(2)
current (IOL = 4 mA)
VOL
Output low-level threshold at 4-mA sink
current (IOL = 4 mA)
tOT
Output transition time (rise time, tR or fall
time, tF) at 40 pF load, measured
between 10% to 90% PAD voltage
10
pF
V
0.25 * vdds_dv_y(2)
V
10
ns
1.8-V Mode
VIH
Input high-level threshold
VIL
Input low-level threshold
II
Input current at each I/O pin with an input
voltage between 0.1 * vdds_dv_y(2) to 0.9
* vdds_dv_y(2)
0.7 * vdds_dv_y(2)
–0.5
–10
vdds_dv_y(2) + 0.5
V
0.3 * vdds_dv_y(2)
V
10
µA
CI
Input capacitance
VOH
Output high-level threshold at 4-mA sink vdds_dv_y(2) – 0.45
current (IOL = 4 mA)
VOL
Output low-level threshold at 4-mA sink
current (IOL = 4 mA)
tOT
Output transition time (rise time, tR or fall
time, tF) at 40 pF load, measured
between 10% to 90% of PAD voltage
10
pF
V
0.45
V
10
ns
(1) VOL specification is not applicable in the Standard mode.
(2) In vdds_dv_y, y can have the value: bank2, bank5, 1p8v, cam depending on the ball used. For more information on a ball and the
corresponding power, see Table 2-1, POWER [9] column.
Copyright © 2012, Texas Instruments Incorporated
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Electrical Characteristics 143