OMAP4460 Datasheet, PDF (221/444 Pages) Texas Instruments – Multimedia Device

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OMAP4460
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GPMC_FCLK
SWPS046A – JANUARY 2012
gpmc_clk
gpmc_ncsx
gpmc_a[10:1]
(gpmc_a[25:16])
gpmc_nbe0_cle
gpmc_nbe1
gpmc_nadv_ale
gpmc_noe
gpmc_d[15:0]
(gpmc_ad[15:0])
gpmc_waitx
FA21
FA9
FA10
Add0
FA10
FA12
FA13
FA20
FA1
FA20 FA20
Add1 Add2 Add3
FA0
Add4
FA0
FA18
D0
D1
D2
D3
D3
FA15
FA14
gpmc_io_dir
OUT
IN
OUT
SWPS040-013
Figure 5-14. GPMC / NOR Flash—Asynchronous Read—Page Mode 4x16-bit Timing^(1)(2)(3)(4)
(1) In gpmc_ncsx, x is equal to 0, 1, 2, 3, 4, 5, 6, or 7. In gpmc_waitx, x is equal to 0, 1, or 2.
(2) FA21 parameter illustrates amount of time required to internally sample first input Page Data. It is expressed in number of GPMC
functional clock cycles. From start of read cycle and after FA21 functional clock cycles, First input Page Data will be internally sampled
by active functional clock edge. FA21 calculation must be stored inside AccessTime register bits field.
(3) FA20 parameter illustrates amount of time required to internally sample successive input Page Data. It is expressed in number of GPMC
functional clock cycles. After each access to input Page Data, next input Page Data will be internally sampled by active functional clock
edge after FA20 functional clock cycles. FA20 is also the duration of address phases for successive input Page Data (excluding first
input Page Data). FA20 value must be stored in PageBurstAccessTime register bits field.
(4) GPMC_FCLK is an internal clock (GPMC functional clock) not provided externally.
Copyright © 2012, Texas Instruments Incorporated
Timing Requirements and Switching Characteristics 221
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