THS8200 Datasheet, PDF (57/97 Pages) Texas Instruments – ALL FORMAT OVERSAMPLED COMPONENT VIDEO/PC GRAPHICS D/A SYSTEM WITH THREE 11-BIT DACS,CGMS DATA INSERTION

READ FORMAT
First write the sub-address, where the data must be read out to the THS8200 in the format as follows:
S
Slave address(w)
A
Sub-address
A
P
S
Slave address(r)
A
DataN
AM
Data(N+1)
AM
......
NAM
P
S
Slave address(r)
A
AM
NAM
Sub-address
Data0
Data(N+1)
P
Start condition
0100 0001 (0x41) if I2CA = 0, or 0100 0011 (0x43) if I2CA = 1
Acknowledge, generated by THS8200; if the transmission is successful, then A = 0, else
A=1
Acknowledge, generated by a master
Not acknowledge, generated by a master
Sub-address of the first register to read, length = one byte
First byte of the data read
Nth byte of the data read
Stop condition
In both write and read operations, the sub-address is incremented automatically when multiple bytes are written/read.
Therefore, only the first sub-address needs to be supplied to the THS8200.
4–42