LM3S818-IQN50-C2 Datasheet, PDF (558/569 Pages) Texas Instruments – LM3S818 Microcontroller

Register Quick Reference
NRND: Not recommended for new designs.
31
30
29
28
27
26
25
24
23
22
15
14
13
12
11
10
9
8
7
6
PWM0CMPB, type R/W, offset 0x05C, reset 0x0000.0000 (see page 486)
PWM1CMPB, type R/W, offset 0x09C, reset 0x0000.0000 (see page 486)
CompB
PWM2CMPB, type R/W, offset 0x0DC, reset 0x0000.0000 (see page 486)
CompB
PWM0GENA, type R/W, offset 0x060, reset 0x0000.0000 (see page 487)
CompB
ActCmpBD
ActCmpBU
PWM1GENA, type R/W, offset 0x0A0, reset 0x0000.0000 (see page 487)
ActCmpAD
ActCmpBD
ActCmpBU
PWM2GENA, type R/W, offset 0x0E0, reset 0x0000.0000 (see page 487)
ActCmpAD
ActCmpBD
ActCmpBU
PWM0GENB, type R/W, offset 0x064, reset 0x0000.0000 (see page 490)
ActCmpAD
ActCmpBD
ActCmpBU
PWM1GENB, type R/W, offset 0x0A4, reset 0x0000.0000 (see page 490)
ActCmpAD
ActCmpBD
ActCmpBU
PWM2GENB, type R/W, offset 0x0E4, reset 0x0000.0000 (see page 490)
ActCmpAD
ActCmpBD
ActCmpBU
PWM0DBCTL, type R/W, offset 0x068, reset 0x0000.0000 (see page 493)
ActCmpAD
21
20
5
4
ActCmpAU
ActCmpAU
ActCmpAU
ActCmpAU
ActCmpAU
ActCmpAU
PWM1DBCTL, type R/W, offset 0x0A8, reset 0x0000.0000 (see page 493)
PWM2DBCTL, type R/W, offset 0x0E8, reset 0x0000.0000 (see page 493)
PWM0DBRISE, type R/W, offset 0x06C, reset 0x0000.0000 (see page 494)
PWM1DBRISE, type R/W, offset 0x0AC, reset 0x0000.0000 (see page 494)
PWM2DBRISE, type R/W, offset 0x0EC, reset 0x0000.0000 (see page 494)
PWM0DBFALL, type R/W, offset 0x070, reset 0x0000.0000 (see page 495)
PWM1DBFALL, type R/W, offset 0x0B0, reset 0x0000.0000 (see page 495)
RiseDelay
RiseDelay
RiseDelay
FallDelay
FallDelay
19
18
3
2
ActLoad
ActLoad
ActLoad
ActLoad
ActLoad
ActLoad
17
16
1
0
ActZero
ActZero
ActZero
ActZero
ActZero
ActZero
Enable
Enable
Enable
558
June 18, 2012
Texas Instruments-Production Data