LM3S818-IQN50-C2 Datasheet, PDF (155/569 Pages) Texas Instruments – LM3S818 Microcontroller

NRND: Not recommended for new designs.
Stellaris^® LM3S818 Microcontroller
5.2.2.3
External RST Pin
Note: It is recommended that the trace for the RST signal must be kept as short as possible. Be
sure to place any components connected to the RST signal as close to the microcontroller
as possible.
If the application only uses the internal POR circuit, the RST input must be connected to the power
supply (V_DD) through an optional pull-up resistor (0 to 100K Ω) as shown in Figure 5-1 on page 155.
Figure 5-1. Basic RST Configuration
VDD
Stellaris®
R_PU
RST
R_PU = 0 to 100 kΩ
The external reset pin (RST) resets the microcontroller including the core and all the on-chip
peripherals except the JTAG TAP controller (see “JTAG Interface” on page 143). The external reset
sequence is as follows:
1. The external reset pin (RST) is asserted for the duration specified by T_MIN and then de-asserted
(see “Reset” on page 529).
2. The internal reset is released and the core loads from memory the initial stack pointer, the initial
program counter, and the first instruction designated by the program counter, and then begins
execution.
To improve noise immunity and/or to delay reset at power up, the RST input may be connected to
an RC network as shown in Figure 5-2 on page 155.
Figure 5-2. External Circuitry to Extend Power-On Reset
VDD
Stellaris®
R_PU
RST
C₁
R_PU = 1 kΩ to 100 kΩ
C₁ = 1 nF to 10 µF
If the application requires the use of an external reset switch, Figure 5-3 on page 156 shows the
proper circuitry to use.
June 18, 2012
155
Texas Instruments-Production Data