LM3S818-IQN50-C2 Datasheet, PDF (546/569 Pages) Texas Instruments – LM3S818 Microcontroller

Register Quick Reference
NRND: Not recommended for new designs.
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
DC4, type RO, offset 0x01C, reset 0x0000.001F (see page 190)
RCGC0, type R/W, offset 0x100, reset 0x00000040 (see page 191)
SCGC0, type R/W, offset 0x110, reset 0x00000040 (see page 193)
MAXADCSPD
MAXADCSPD
DCGC0, type R/W, offset 0x120, reset 0x00000040 (see page 195)
RCGC1, type R/W, offset 0x104, reset 0x00000000 (see page 197)
SCGC1, type R/W, offset 0x114, reset 0x00000000 (see page 199)
DCGC1, type R/W, offset 0x124, reset 0x00000000 (see page 201)
RCGC2, type R/W, offset 0x108, reset 0x00000000 (see page 203)
COMP0
QEI0
COMP0
QEI0
COMP0
QEI0
GPIOE GPIOD GPIOC GPIOB GPIOA
PWM
WDT
ADC
PWM
WDT
ADC
PWM
WDT
ADC
SSI0
TIMER2 TIMER1 TIMER0
UART1 UART0
SSI0
TIMER2 TIMER1 TIMER0
UART1 UART0
SSI0
TIMER2 TIMER1 TIMER0
UART1 UART0
SCGC2, type R/W, offset 0x118, reset 0x00000000 (see page 204)
GPIOE GPIOD GPIOC GPIOB GPIOA
DCGC2, type R/W, offset 0x128, reset 0x00000000 (see page 206)
GPIOE GPIOD GPIOC GPIOB GPIOA
SRCR0, type R/W, offset 0x040, reset 0x00000000 (see page 208)
SRCR1, type R/W, offset 0x044, reset 0x00000000 (see page 209)
SRCR2, type R/W, offset 0x048, reset 0x00000000 (see page 211)
COMP0
QEI0
GPIOE GPIOD GPIOC GPIOB GPIOA
PWM
WDT
ADC
SSI0
TIMER2 TIMER1 TIMER0
UART1 UART0
Internal Memory
Flash Memory Control Registers (Flash Control Offset)
Base 0x400F.D000
FMA, type R/W, offset 0x000, reset 0x0000.0000
GPIOE GPIOD GPIOC GPIOB GPIOA
FMD, type R/W, offset 0x004, reset 0x0000.0000
FMC, type R/W, offset 0x008, reset 0x0000.0000
OFFSET
DATA
DATA
WRKEY
COMT MERASE ERASE WRITE
546
June 18, 2012
Texas Instruments-Production Data