LM3S818-IQN50-C2 Datasheet, PDF (20/569 Pages) Texas Instruments – LM3S818 Microcontroller

Revision History
NRND: Not recommended for new designs.
Revision History
The revision history table notes changes made between the indicated revisions of the LM3S818
data sheet.
Table 1. Revision History
Date
June 2012
Revision Description
12739.2515 ■ In Reset Characteristics table, changed values and units for Internal reset timeout after hardware
reset (R7).
■ Removed 48QFN package.
■ Minor data sheet clarifications and corrections.
November 2011
11107
■ Added module-specific pin tables to each chapter in the new Signal Description sections.
■ In Timer chapter, clarified that in 16-Bit Input Edge Time Mode, the timer is capable of capturing
three types of events: rising edge, falling edge, or both.
■ In UART chapter, clarified interrupt behavior.
■ In SSI chapter, corrected SSIClk in the figure "Synchronous Serial Frame Format (Single Transfer)".
■ In Signal Tables chapter:
– Corrected pin numbers in table "Connections for Unused Signals" (other pin tables were correct).
– Corrected buffer type for PWMn signals in pin tables.
■ In Electrical Characteristics chapter:
– Added parameter "Input voltage for a GPIO configured as an analog input" to the "Maximum
Ratings" table.
– Corrected Nom values for parameters "TCK clock Low time" and "TCK clock High time" in "JTAG
Characteristics" table.
■ Additional minor data sheet clarifications and corrections.
January 2011
9102
■ In Application Interrupt and Reset Control (APINT) register, changed bit name from SYSRESETREQ
to SYSRESREQ.
■ Added DEBUG (Debug Priority) bit field to System Handler Priority 3 (SYSPRI3) register.
■ Added "Reset Sources" table to System Control chapter.
■ Removed mention of false-start bit detection in the UART chapter. This feature is not supported.
■ Added note that specific module clocks must be enabled before that module's registers can be
programmed. There must be a delay of 3 system clocks after the module clock is enabled before
any of that module's registers are accessed.
■ Corrected nonlinearity and offset error parameters (E_L, E_D, and E_O) in ADC Characteristics table.
■ Added specification for maximum input voltage on a non-power pin when the microcontroller is
unpowered (V_NON parameter in Maximum Ratings table).
■ Additional minor data sheet clarifications and corrections.
20
June 18, 2012
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