LM3S300-IQN25-C2 Datasheet, PDF (5/498 Pages) Texas Instruments – Stellaris LM3S300 Microcontroller

NRND: Not recommended for new designs.
Stellaris^® LM3S300 Microcontroller
6
6.1
6.2
6.2.1
6.2.2
6.3
6.3.1
6.3.2
6.4
6.5
6.6
7
7.1
7.2
7.2.1
7.2.2
7.2.3
7.2.4
7.2.5
7.3
7.4
7.5
8
8.1
8.2
8.3
8.3.1
8.3.2
8.3.3
8.4
8.4.1
8.4.2
8.4.3
8.4.4
8.4.5
8.4.6
8.5
8.6
9
9.1
9.2
9.3
9.4
9.5
10
10.1
10.2
Internal Memory ................................................................................................... 205
Block Diagram ............................................................................................................ 205
Functional Description ................................................................................................. 205
SRAM Memory ............................................................................................................ 205
Flash Memory ............................................................................................................. 206
Flash Memory Initialization and Configuration ............................................................... 208
Changing Flash Protection Bits .................................................................................... 208
Flash Programming ..................................................................................................... 209
Register Map .............................................................................................................. 210
Flash Register Descriptions (Flash Control Offset) ......................................................... 210
Flash Register Descriptions (System Control Offset) ...................................................... 218
General-Purpose Input/Outputs (GPIOs) ........................................................... 222
Signal Description ....................................................................................................... 222
Functional Description ................................................................................................. 225
Data Control ............................................................................................................... 226
Interrupt Control .......................................................................................................... 227
Mode Control .............................................................................................................. 227
Pad Control ................................................................................................................. 227
Identification ............................................................................................................... 227
Initialization and Configuration ..................................................................................... 227
Register Map .............................................................................................................. 229
Register Descriptions .................................................................................................. 230
General-Purpose Timers ...................................................................................... 262
Block Diagram ............................................................................................................ 262
Signal Description ....................................................................................................... 263
Functional Description ................................................................................................. 264
GPTM Reset Conditions .............................................................................................. 264
32-Bit Timer Operating Modes ...................................................................................... 264
16-Bit Timer Operating Modes ...................................................................................... 265
Initialization and Configuration ..................................................................................... 269
32-Bit One-Shot/Periodic Timer Mode ........................................................................... 269
32-Bit Real-Time Clock (RTC) Mode ............................................................................. 270
16-Bit One-Shot/Periodic Timer Mode ........................................................................... 270
16-Bit Input Edge Count Mode ..................................................................................... 271
16-Bit Input Edge Timing Mode .................................................................................... 271
16-Bit PWM Mode ....................................................................................................... 272
Register Map .............................................................................................................. 272
Register Descriptions .................................................................................................. 273
Watchdog Timer ................................................................................................... 298
Block Diagram ............................................................................................................ 299
Functional Description ................................................................................................. 299
Initialization and Configuration ..................................................................................... 300
Register Map .............................................................................................................. 300
Register Descriptions .................................................................................................. 301
Universal Asynchronous Receivers/Transmitters (UARTs) ............................. 322
Block Diagram ............................................................................................................ 323
Signal Description ....................................................................................................... 323
June 18, 2012
5
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